Unverified Commit 89931cb4 authored by Alexandre Torgue's avatar Alexandre Torgue Committed by Arnd Bergmann
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ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15 



Adding a "secure" version of STM32 boards (DK1/DK2/ED1/EV1), SCMI (clock/
reset) protocol and OP-TEE node have been added in SoC dtsi file
(stm32mp151.dtsi). They have been added with a status disabled in order to
keep our legacy unchanged. It is actually not enough to keep our legacy
unchanged.

First, just a reminder about our use case: TF-A (BL2) loads and starts
OP-TEE, then loads and runs U-Boot. U-Boot code checks if an OP-TEE is
running, if yes it searches in Kernel device tree if an OP-TEE node is
present:

-If the OP-TEE node is not present then U-Boot copies OP-TEE node and its
reserved memory region from U-Boot device tree to the kernel device tree.

-If the OP-TEE node is present then it does nothing (this OP-TEE node will
be used by Linux). So U-Boot lets the kernel device tree unchanged thinking
it is correct for an OP-TEE usage. It is the case for our legacy boards,
the OP-TEE node is present (although disabled) but the reserved memory
region is not declared. As no memory region has been reserved for OP-TEE,
the end of DDR is seen by the kernel as free and then used for CMA. But as
OP-TEE is running, this end of DDR is already used by OP-TEE. So as soon as
kernel tries to access to the CMA region OP-TEE raises an error.

To fix it, all OP-TEE node and SCMI is moved in a dedicated file.

Fixes: 40b4157d ("ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15")
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
Link: https://lore.kernel.org/r/20220613071920.5463-1-alexandre.torgue@foss.st.com

'
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 002ec157

arch/arm/boot/dts/stm32mp15-scmi.dtsi

0 → 100644
+47 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/*

 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved

 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.

 */



/ {

	firmware {

		optee: optee {

			compatible = "linaro,optee-tz";

			method = "smc";

		};



		scmi: scmi {

			compatible = "linaro,scmi-optee";

			#address-cells = <1>;

			#size-cells = <0>;

			linaro,optee-channel-id = <0>;

			shmem = <&scmi_shm>;



			scmi_clk: protocol@14 {

				reg = <0x14>;

				#clock-cells = <1>;

			};



			scmi_reset: protocol@16 {

				reg = <0x16>;

				#reset-cells = <1>;

			};

		};

	};



	soc {

		scmi_sram: sram@2ffff000 {

			compatible = "mmio-sram";

			reg = <0x2ffff000 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x2ffff000 0x1000>;



			scmi_shm: scmi-sram@0 {

				compatible = "arm,scmi-shmem";

				reg = <0 0x80>;

			};

		};

	};

};

arch/arm/boot/dts/stm32mp151.dtsi

+0 −41
Original line number Diff line number Diff line
@@ -115,33 +115,6 @@ 
		status = "disabled";

	};



	firmware {

		optee: optee {

			compatible = "linaro,optee-tz";

			method = "smc";

			status = "disabled";

		};



		scmi: scmi {

			compatible = "linaro,scmi-optee";

			#address-cells = <1>;

			#size-cells = <0>;

			linaro,optee-channel-id = <0>;

			shmem = <&scmi_shm>;

			status = "disabled";



			scmi_clk: protocol@14 {

				reg = <0x14>;

				#clock-cells = <1>;

			};



			scmi_reset: protocol@16 {

				reg = <0x16>;

				#reset-cells = <1>;

			};

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -149,20 +122,6 @@ 
		interrupt-parent = <&intc>;

		ranges;



		scmi_sram: sram@2ffff000 {

			compatible = "mmio-sram";

			reg = <0x2ffff000 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x2ffff000 0x1000>;



			scmi_shm: scmi-sram@0 {

				compatible = "arm,scmi-shmem";

				reg = <0 0x80>;

				status = "disabled";

			};

		};



		timers2: timer@40000000 {

			#address-cells = <1>;

			#size-cells = <0>;

arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts

+1 −12
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
/dts-v1/;



#include "stm32mp157a-dk1.dts"

#include "stm32mp15-scmi.dtsi"



/ {

	model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
@@ -54,10 +55,6 @@ 
	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -76,11 +73,3 @@ 
&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};
 


&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};

arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts

+1 −12
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
/dts-v1/;



#include "stm32mp157c-dk2.dts"

#include "stm32mp15-scmi.dtsi"



/ {

	model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
@@ -63,10 +64,6 @@ 
	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -85,11 +82,3 @@ 
&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};
 


&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};

arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts

+1 −12
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
/dts-v1/;



#include "stm32mp157c-ed1.dts"

#include "stm32mp15-scmi.dtsi"



/ {

	model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
@@ -59,10 +60,6 @@ 
	resets = <&scmi_reset RST_SCMI_MCU>;

};



&optee {

	status = "okay";

};



&rcc {

	compatible = "st,stm32mp1-rcc-secure", "syscon";

	clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -81,11 +78,3 @@ 
&rtc {

	clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;

};
 


&scmi {

	status = "okay";

};



&scmi_shm {

	status = "okay";

};