Commit 893cf382 authored by Candice Li's avatar Candice Li Committed by Alex Deucher
Browse files

drm/amd/amdgpu: remove unnecessary RAS context field 



Delete ras_if->name in the RAS ctx structure and remove related lines.

Signed-off-by: default avatarCandice Li <candice.li@amd.com>
Reviewed-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2bbab7ce

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+0 −1
Original line number Diff line number Diff line
@@ -615,7 +615,6 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev) 
		adev->gfx.ras_if->block = AMDGPU_RAS_BLOCK__GFX;

		adev->gfx.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->gfx.ras_if->sub_block_index = 0;

		strcpy(adev->gfx.ras_if->name, "gfx");

	}

	fs_info.head = ih_info.head = *adev->gfx.ras_if;

	r = amdgpu_ras_late_init(adev, adev->gfx.ras_if,

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

+0 −1
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev) 
		adev->hdp.ras_if->block = AMDGPU_RAS_BLOCK__HDP;

		adev->hdp.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->hdp.ras_if->sub_block_index = 0;

		strcpy(adev->hdp.ras_if->name, "hdp");

	}

	ih_info.head = fs_info.head = *adev->hdp.ras_if;

	r = amdgpu_ras_late_init(adev, adev->hdp.ras_if,

drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c

+0 −1
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ int amdgpu_mmhub_ras_late_init(struct amdgpu_device *adev) 
		adev->mmhub.ras_if->block = AMDGPU_RAS_BLOCK__MMHUB;

		adev->mmhub.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->mmhub.ras_if->sub_block_index = 0;

		strcpy(adev->mmhub.ras_if->name, "mmhub");

	}

	ih_info.head = fs_info.head = *adev->mmhub.ras_if;

	r = amdgpu_ras_late_init(adev, adev->mmhub.ras_if,

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

+0 −1
Original line number Diff line number Diff line
@@ -39,7 +39,6 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev) 
		adev->nbio.ras_if->block = AMDGPU_RAS_BLOCK__PCIE_BIF;

		adev->nbio.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->nbio.ras_if->sub_block_index = 0;

		strcpy(adev->nbio.ras_if->name, "pcie_bif");

	}

	ih_info.head = fs_info.head = *adev->nbio.ras_if;

	r = amdgpu_ras_late_init(adev, adev->nbio.ras_if,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+1 −3
Original line number Diff line number Diff line
@@ -64,7 +64,6 @@ const char *ras_block_string[] = { 
};



#define ras_err_str(i) (ras_error_string[ffs(i)])

#define ras_block_str(i) (ras_block_string[i])



#define RAS_DEFAULT_FLAGS (AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
@@ -530,7 +529,7 @@ static inline void put_obj(struct ras_manager *obj) 
	if (obj && (--obj->use == 0))

		list_del(&obj->node);

	if (obj && (obj->use < 0))

		DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", obj->head.name);

		DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", ras_block_str(obj->head.block));

}



/* make one obj and return it. */
@@ -793,7 +792,6 @@ static int amdgpu_ras_enable_all_features(struct amdgpu_device *adev, 
			.type = default_ras_type,

			.sub_block_index = 0,

		};

		strcpy(head.name, ras_block_str(i));

		if (bypass) {

			/*

			 * bypass psp. vbios enable ras for us.