Commit 88af9bd4 authored by Wong, Vee Khee's avatar Wong, Vee Khee Committed by Jakub Kicinski
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stmmac: intel: Add ADL-S 1Gbps PCI IDs 



Added PCI IDs for both Ethernet TSN Controllers on the ADL-S.

Also, skip SerDes programming sequences as these are being carried out
at the BIOS level for ADL-S.

Signed-off-by: default avatarWong, Vee Khee <vee.khee.wong@intel.com>
Link: https://lore.kernel.org/r/20210126085832.3814-1-vee.khee.wong@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent bbc20b70

drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c

+19 −0
Original line number Diff line number Diff line
@@ -457,6 +457,21 @@ static struct stmmac_pci_info tgl_sgmii1g_info = { 
	.setup = tgl_sgmii_data,

};



static int adls_sgmii_data(struct pci_dev *pdev,

			   struct plat_stmmacenet_data *plat)

{

	plat->bus_id = 1;

	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;



	/* SerDes power up and power down are done in BIOS for ADL */



	return tgl_common_data(pdev, plat);

}



static struct stmmac_pci_info adls_sgmii1g_info = {

	.setup = adls_sgmii_data,

};



static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = {

	{

		.func = 6,
@@ -724,6 +739,8 @@ static SIMPLE_DEV_PM_OPS(intel_eth_pm_ops, intel_eth_pci_suspend, 
#define PCI_DEVICE_ID_INTEL_TGLH_SGMII1G_0_ID		0x43ac

#define PCI_DEVICE_ID_INTEL_TGLH_SGMII1G_1_ID		0x43a2

#define PCI_DEVICE_ID_INTEL_TGL_SGMII1G_ID		0xa0ac

#define PCI_DEVICE_ID_INTEL_ADLS_SGMII1G_0_ID		0x7aac

#define PCI_DEVICE_ID_INTEL_ADLS_SGMII1G_1_ID		0x7aad



static const struct pci_device_id intel_eth_pci_id_table[] = {

	{ PCI_DEVICE_DATA(INTEL, QUARK_ID, &quark_info) },
@@ -739,6 +756,8 @@ static const struct pci_device_id intel_eth_pci_id_table[] = { 
	{ PCI_DEVICE_DATA(INTEL, TGL_SGMII1G_ID, &tgl_sgmii1g_info) },

	{ PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_0_ID, &tgl_sgmii1g_info) },

	{ PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_1_ID, &tgl_sgmii1g_info) },

	{ PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_0_ID, &adls_sgmii1g_info) },

	{ PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_1_ID, &adls_sgmii1g_info) },

	{}

};

MODULE_DEVICE_TABLE(pci, intel_eth_pci_id_table);