Unverified Commit 88939e73 authored by Mark Brown's avatar Mark Brown
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Merge series "ASoC: mediatek: Add support for MT8195 SoC" from Trevor Wu <trevor.wu@mediatek.com>:

This series of patches adds support for Mediatek AFE of MT8195 SoC.
Patches are based on broonie tree "for-next" branch.

Changes since v4:
  - removed sof related code

Changes since v3:
  - fixed warnings found by kernel test robot
  - removed unused critical section
  - corrected the lock protected sections on etdm driver
  - added DPTX and HDMITX audio support

Changes since v2:
  - added audio clock gate control
  - added 'mediatek' prefix to private dts properties
  - added consumed clocks to dt-bindins and adopted suggestions from Rob
  - refined clock usage and remove unused clock and control code
  - fixed typos

Changes since v1:
  - fixed some problems related to dt-bindings
  - added some missing properties to dt-bindings
  - added depency declaration on dt-bindings
  - fixed some warnings found by kernel test robot

Trevor Wu (11):
  ASoC: mediatek: mt8195: update mediatek common driver
  ASoC: mediatek: mt8195: support audsys clock control
  ASoC: mediatek: mt8195: support etdm in platform driver
  ASoC: mediatek: mt8195: support adda in platform driver
  ASoC: mediatek: mt8195: support pcm in platform driver
  ASoC: mediatek: mt8195: add platform driver
  dt-bindings: mediatek: mt8195: add audio afe document
  ASoC: mediatek: mt8195: add machine driver with mt6359, rt1019 and
    rt5682
  ASoC: mediatek: mt8195: add DPTX audio support
  ASoC: mediatek: mt8195: add HDMITX audio support
  dt-bindings: mediatek: mt8195: add mt8195-mt6359-rt1019-rt5682
    document

 .../bindings/sound/mt8195-afe-pcm.yaml        |  184 +
 .../sound/mt8195-mt6359-rt1019-rt5682.yaml    |   47 +
 sound/soc/mediatek/Kconfig                    |   24 +
 sound/soc/mediatek/Makefile                   |    1 +
 sound/soc/mediatek/common/mtk-afe-fe-dai.c    |   22 +-
 sound/soc/mediatek/common/mtk-base-afe.h      |   10 +-
 sound/soc/mediatek/mt8195/Makefile            |   15 +
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c    |  441 +++
 sound/soc/mediatek/mt8195/mt8195-afe-clk.h    |  109 +
 sound/soc/mediatek/mt8195/mt8195-afe-common.h |  158 +
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c    | 3281 +++++++++++++++++
 sound/soc/mediatek/mt8195/mt8195-audsys-clk.c |  214 ++
 sound/soc/mediatek/mt8195/mt8195-audsys-clk.h |   15 +
 .../soc/mediatek/mt8195/mt8195-audsys-clkid.h |   93 +
 sound/soc/mediatek/mt8195/mt8195-dai-adda.c   |  830 +++++
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c   | 2639 +++++++++++++
 sound/soc/mediatek/mt8195/mt8195-dai-pcm.c    |  389 ++
 .../mt8195/mt8195-mt6359-rt1019-rt5682.c      | 1087 ++++++
 sound/soc/mediatek/mt8195/mt8195-reg.h        | 2796 ++++++++++++++
 19 files changed, 12350 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
 create mode 100644 Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml
 create mode 100644 sound/soc/mediatek/mt8195/Makefile
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-clk.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-clk.h
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-common.h
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clk.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clk.h
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-adda.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-pcm.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-mt6359-rt1019-rt5682.c
 create mode 100644 sound/soc/mediatek/mt8195/mt8195-reg.h

--
2.18.0
parents 0be10d71 5f8c991e
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek AFE PCM controller for mt8195

maintainers:
  - Trevor Wu <trevor.wu@mediatek.com>

properties:
  compatible:
    const: mediatek,mt8195-audio

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  mediatek,topckgen:
    $ref: "/schemas/types.yaml#/definitions/phandle"
    description: The phandle of the mediatek topckgen controller

  power-domains:
    maxItems: 1

  clocks:
    items:
      - description: 26M clock
      - description: audio pll1 clock
      - description: audio pll2 clock
      - description: clock divider for i2si1_mck
      - description: clock divider for i2si2_mck
      - description: clock divider for i2so1_mck
      - description: clock divider for i2so2_mck
      - description: clock divider for dptx_mck
      - description: a1sys hoping clock
      - description: audio intbus clock
      - description: audio hires clock
      - description: audio local bus clock
      - description: mux for dptx_mck
      - description: mux for i2so1_mck
      - description: mux for i2so2_mck
      - description: mux for i2si1_mck
      - description: mux for i2si2_mck
      - description: audio infra 26M clock
      - description: infra bus clock

  clock-names:
    items:
      - const: clk26m
      - const: apll1_ck
      - const: apll2_ck
      - const: apll12_div0
      - const: apll12_div1
      - const: apll12_div2
      - const: apll12_div3
      - const: apll12_div9
      - const: a1sys_hp_sel
      - const: aud_intbus_sel
      - const: audio_h_sel
      - const: audio_local_bus_sel
      - const: dptx_m_sel
      - const: i2so1_m_sel
      - const: i2so2_m_sel
      - const: i2si1_m_sel
      - const: i2si2_m_sel
      - const: infra_ao_audio_26m_b
      - const: scp_adsp_audiodsp

  mediatek,etdm-in1-chn-disabled:
    $ref: /schemas/types.yaml#/definitions/uint8-array
    maxItems: 24
    description: Specify which input channel should be disabled.

  mediatek,etdm-in2-chn-disabled:
    $ref: /schemas/types.yaml#/definitions/uint8-array
    maxItems: 16
    description: Specify which input channel should be disabled.

patternProperties:
  "^mediatek,etdm-in[1-2]-mclk-always-on-rate-hz$":
    description: Specify etdm in mclk output rate for always on case.

  "^mediatek,etdm-out[1-3]-mclk-always-on-rate-hz$":
    description: Specify etdm out mclk output rate for always on case.

  "^mediatek,etdm-in[1-2]-multi-pin-mode$":
    type: boolean
    description: if present, the etdm data mode is I2S.

  "^mediatek,etdm-out[1-3]-multi-pin-mode$":
    type: boolean
    description: if present, the etdm data mode is I2S.

  "^mediatek,etdm-in[1-2]-cowork-source$":
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      etdm modules can share the same external clock pin. Specify
      which etdm clock source is required by this etdm in moudule.
    enum:
      - 0 # etdm1_in
      - 1 # etdm2_in
      - 2 # etdm1_out
      - 3 # etdm2_out

  "^mediatek,etdm-out[1-2]-cowork-source$":
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      etdm modules can share the same external clock pin. Specify
      which etdm clock source is required by this etdm out moudule.
    enum:
      - 0 # etdm1_in
      - 1 # etdm2_in
      - 2 # etdm1_out
      - 3 # etdm2_out

required:
  - compatible
  - reg
  - interrupts
  - mediatek,topckgen
  - power-domains
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/mt8195-clk.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/power/mt8195-power.h>

    afe: mt8195-afe-pcm@10890000 {
        compatible = "mediatek,mt8195-audio";
        reg = <0x10890000 0x10000>;
        interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
        mediatek,topckgen = <&topckgen>;
        power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
        clocks = <&clk26m>,
                 <&topckgen CLK_TOP_APLL1>,
                 <&topckgen CLK_TOP_APLL2>,
                 <&topckgen CLK_TOP_APLL12_DIV0>,
                 <&topckgen CLK_TOP_APLL12_DIV1>,
                 <&topckgen CLK_TOP_APLL12_DIV2>,
                 <&topckgen CLK_TOP_APLL12_DIV3>,
                 <&topckgen CLK_TOP_APLL12_DIV9>,
                 <&topckgen CLK_TOP_A1SYS_HP_SEL>,
                 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
                 <&topckgen CLK_TOP_AUDIO_H_SEL>,
                 <&topckgen CLK_TOP_AUDIO_LOCAL_BUS_SEL>,
                 <&topckgen CLK_TOP_DPTX_M_SEL>,
                 <&topckgen CLK_TOP_I2SO1_M_SEL>,
                 <&topckgen CLK_TOP_I2SO2_M_SEL>,
                 <&topckgen CLK_TOP_I2SI1_M_SEL>,
                 <&topckgen CLK_TOP_I2SI2_M_SEL>,
                 <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>,
                 <&scp_adsp CLK_SCP_ADSP_AUDIODSP>;
        clock-names = "clk26m",
                      "apll1_ck",
                      "apll2_ck",
                      "apll12_div0",
                      "apll12_div1",
                      "apll12_div2",
                      "apll12_div3",
                      "apll12_div9",
                      "a1sys_hp_sel",
                      "aud_intbus_sel",
                      "audio_h_sel",
                      "audio_local_bus_sel",
                      "dptx_m_sel",
                      "i2so1_m_sel",
                      "i2so2_m_sel",
                      "i2si1_m_sel",
                      "i2si2_m_sel",
                      "infra_ao_audio_26m_b",
                      "scp_adsp_audiodsp";
    };

...
+47 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8195-mt6359-rt1019-rt5682.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek MT8195 with MT6359, RT1019 and RT5682 ASoC sound card driver

maintainers:
  - Trevor Wu <trevor.wu@mediatek.com>

description:
  This binding describes the MT8195 sound card.

properties:
  compatible:
    const: mediatek,mt8195_mt6359_rt1019_rt5682

  mediatek,platform:
    $ref: "/schemas/types.yaml#/definitions/phandle"
    description: The phandle of MT8195 ASoC platform.

  mediatek,dptx-codec:
    $ref: "/schemas/types.yaml#/definitions/phandle"
    description: The phandle of MT8195 Display Port Tx codec node.

  mediatek,hdmi-codec:
    $ref: "/schemas/types.yaml#/definitions/phandle"
    description: The phandle of MT8195 HDMI codec node.

additionalProperties: false

required:
  - compatible
  - mediatek,platform

examples:
  - |

    sound: mt8195-sound {
        compatible = "mediatek,mt8195_mt6359_rt1019_rt5682";
        mediatek,platform = <&afe>;
        pinctrl-names = "default";
        pinctrl-0 = <&aud_pins_default>;
    };

...
+24 −0
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@@ -184,3 +184,27 @@ config SND_SOC_MT8192_MT6359_RT1015_RT5682
	  with the MT6359 RT1015 RT5682 audio codec.
	  Select Y if you have such device.
	  If unsure select "N".

config SND_SOC_MT8195
	tristate "ASoC support for Mediatek MT8195 chip"
	select SND_SOC_MEDIATEK
	help
	  This adds ASoC platform driver support for Mediatek MT8195 chip
	  that can be used with other codecs.
	  Select Y if you have such device.
	  If unsure select "N".

config SND_SOC_MT8195_MT6359_RT1019_RT5682
	tristate "ASoC Audio driver for MT8195 with MT6359 RT1019 RT5682 codec"
	depends on I2C
	depends on SND_SOC_MT8195
	select SND_SOC_MT6359
	select SND_SOC_RT1015P
	select SND_SOC_RT5682_I2C
	select SND_SOC_DMIC
	select SND_SOC_HDMI_CODEC
	help
	  This adds ASoC driver for Mediatek MT8195 boards
	  with the MT6359 RT1019 RT5682 audio codec.
	  Select Y if you have such device.
	  If unsure select "N".
+1 −0
Original line number Diff line number Diff line
@@ -5,3 +5,4 @@ obj-$(CONFIG_SND_SOC_MT6797) += mt6797/
obj-$(CONFIG_SND_SOC_MT8173) += mt8173/
obj-$(CONFIG_SND_SOC_MT8183) += mt8183/
obj-$(CONFIG_SND_SOC_MT8192) += mt8192/
obj-$(CONFIG_SND_SOC_MT8195) += mt8195/
+19 −3
Original line number Diff line number Diff line
@@ -139,7 +139,7 @@ int mtk_afe_fe_hw_params(struct snd_pcm_substream *substream,
		substream->runtime->dma_area,
		substream->runtime->dma_bytes);

	memset_io(substream->runtime->dma_area, 0,
	memset_io((void __force __iomem *)substream->runtime->dma_area, 0,
		  substream->runtime->dma_bytes);

	/* set addr */
@@ -433,11 +433,20 @@ int mtk_memif_set_addr(struct mtk_base_afe *afe, int id,
				 phys_buf_addr_upper_32);
	}

	/* set MSB to 33-bit */
	if (memif->data->msb_reg >= 0)
	/*
	 * set MSB to 33-bit, for memif address
	 * only for memif base address, if msb_end_reg exists
	 */
	if (memif->data->msb_reg)
		mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
				       1, msb_at_bit33, memif->data->msb_shift);

	/* set MSB to 33-bit, for memif end address */
	if (memif->data->msb_end_reg)
		mtk_regmap_update_bits(afe->regmap, memif->data->msb_end_reg,
				       1, msb_at_bit33,
				       memif->data->msb_end_shift);

	return 0;
}
EXPORT_SYMBOL_GPL(mtk_memif_set_addr);
@@ -464,6 +473,13 @@ int mtk_memif_set_channel(struct mtk_base_afe *afe,
	else
		mono = (channel == 1) ? 1 : 0;

	/* for specific configuration of memif mono mode */
	if (memif->data->int_odd_flag_reg)
		mtk_regmap_update_bits(afe->regmap,
				       memif->data->int_odd_flag_reg,
				       1, mono,
				       memif->data->int_odd_flag_shift);

	return mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
				      1, mono, memif->data->mono_shift);
}
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