Commit 87e8657b authored by Chuanjia Liu's avatar Chuanjia Liu Committed by Lorenzo Pieralisi
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PCI: mediatek: Add new method to get shared pcie-cfg base address

For the new dts format, add a new method to get
shared pcie-cfg base address and use it to configure
the PCIECFG controller

Link: https://lore.kernel.org/r/20210823032800.1660-3-chuanjia.liu@mediatek.com


Signed-off-by: default avatarChuanjia Liu <chuanjia.liu@mediatek.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarRyder Lee <ryder.lee@mediatek.com>
parent aa6eca5b
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+17 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/mfd/syscon.h>
#include <linux/msi.h>
#include <linux/module.h>
#include <linux/of_address.h>
@@ -23,6 +24,7 @@
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/reset.h>

#include "../pci.h"
@@ -207,6 +209,7 @@ struct mtk_pcie_port {
 * struct mtk_pcie - PCIe host information
 * @dev: pointer to PCIe device
 * @base: IO mapped register base
 * @cfg: IO mapped register map for PCIe config
 * @free_ck: free-run reference clock
 * @mem: non-prefetchable memory resource
 * @ports: pointer to PCIe port information
@@ -215,6 +218,7 @@ struct mtk_pcie_port {
struct mtk_pcie {
	struct device *dev;
	void __iomem *base;
	struct regmap *cfg;
	struct clk *free_ck;

	struct list_head ports;
@@ -682,6 +686,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
		val |= PCIE_CSR_LTSSM_EN(port->slot) |
		       PCIE_CSR_ASPM_L1_EN(port->slot);
		writel(val, pcie->base + PCIE_SYS_CFG_V2);
	} else if (pcie->cfg) {
		val = PCIE_CSR_LTSSM_EN(port->slot) |
		      PCIE_CSR_ASPM_L1_EN(port->slot);
		regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val);
	}

	/* Assert all reset signals */
@@ -985,6 +993,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
	struct device *dev = pcie->dev;
	struct platform_device *pdev = to_platform_device(dev);
	struct resource *regs;
	struct device_node *cfg_node;
	int err;

	/* get shared registers, which are optional */
@@ -995,6 +1004,14 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
			return PTR_ERR(pcie->base);
	}

	cfg_node = of_find_compatible_node(NULL, NULL,
					   "mediatek,generic-pciecfg");
	if (cfg_node) {
		pcie->cfg = syscon_node_to_regmap(cfg_node);
		if (IS_ERR(pcie->cfg))
			return PTR_ERR(pcie->cfg);
	}

	pcie->free_ck = devm_clk_get(dev, "free_ck");
	if (IS_ERR(pcie->free_ck)) {
		if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)