Commit 879358fc authored by Mark Brown's avatar Mark Brown Committed by Will Deacon
Browse files

arm64: Define CPACR_EL1_FPEN similarly to other floating point controls 



The base floating point, SVE and SME all have enable controls for EL0 and
EL1 in CPACR_EL1 which have a similar layout and function. Currently the
basic floating point enable FPEN is defined differently to the SVE control,
specified as a single define in kvm_arm.h rather than in sysreg.h. Move the
define to sysreg.h and provide separate EL0 and EL1 control bits so code
managing the different floating point enables can look consistent.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220207152109.197566-2-broonie@kernel.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent dfd42fac

arch/arm64/include/asm/kvm_arm.h

+0 −1
Original line number Diff line number Diff line
@@ -355,7 +355,6 @@ 
	ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \

	ECN(BKPT32), ECN(VECTOR32), ECN(BRK64)



#define CPACR_EL1_FPEN		(3 << 20)

#define CPACR_EL1_TTA		(1 << 28)

#define CPACR_EL1_DEFAULT	(CPACR_EL1_FPEN | CPACR_EL1_ZEN_EL1EN)

arch/arm64/include/asm/sysreg.h

+4 −0
Original line number Diff line number Diff line
@@ -1097,6 +1097,10 @@ 
#define ZCR_ELx_LEN_SIZE	9

#define ZCR_ELx_LEN_MASK	0x1ff



#define CPACR_EL1_FPEN_EL1EN	(BIT(20)) /* enable EL1 access */

#define CPACR_EL1_FPEN_EL0EN	(BIT(21)) /* enable EL0 access, if EL1EN set */

#define CPACR_EL1_FPEN		(CPACR_EL1_FPEN_EL1EN | CPACR_EL1_FPEN_EL0EN)



#define CPACR_EL1_ZEN_EL1EN	(BIT(16)) /* enable EL1 access */

#define CPACR_EL1_ZEN_EL0EN	(BIT(17)) /* enable EL0 access, if EL1EN set */

#define CPACR_EL1_ZEN		(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)