Commit 8747075f authored by Paul Hsieh's avatar Paul Hsieh Committed by Alex Deucher
Browse files

drm/amd/display: read invalid ddc pin status cause engine busy 



[Why]
There is no DDC_6 pin on new asic cause the mapping table is
incorrect. When app try to access DDC_VGA port, driver read
an invalid ddc pin status and report engine busy.

[How]
Add dummy DDC_6 pin to align gpio structure.

Reviewed-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarPaul Hsieh <Paul.Hsieh@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2a2acdd7

drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c

+2 −2
Original line number Diff line number Diff line
@@ -256,8 +256,8 @@ static const struct hw_factory_funcs funcs = { 
 */

void dal_hw_factory_dcn32_init(struct hw_factory *factory)

{

	factory->number_of_pins[GPIO_ID_DDC_DATA] = 6;

	factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 6;

	factory->number_of_pins[GPIO_ID_DDC_DATA] = 8;

	factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8;

	factory->number_of_pins[GPIO_ID_GENERIC] = 4;

	factory->number_of_pins[GPIO_ID_HPD] = 5;

	factory->number_of_pins[GPIO_ID_GPIO_PAD] = 28;