Commit 86dca369 authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar
Browse files

perf/x86/intel: Fix event constraints for ICL 



According to the latest event list, the event encoding 0x55
INST_DECODED.DECODERS and 0x56 UOPS_DECODED.DEC0 are only available on
the first 4 counters. Add them into the event constraints table.

Fixes: 60176089 ("perf/x86/intel: Add Icelake support")
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarPeter Zijlstra <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220525133952.1660658-1-kan.liang@linux.intel.com
parent 6f3f04c1

arch/x86/events/intel/core.c

+1 −1
Original line number Diff line number Diff line
@@ -276,7 +276,7 @@ static struct event_constraint intel_icl_event_constraints[] = { 
	INTEL_EVENT_CONSTRAINT_RANGE(0x03, 0x0a, 0xf),

	INTEL_EVENT_CONSTRAINT_RANGE(0x1f, 0x28, 0xf),

	INTEL_EVENT_CONSTRAINT(0x32, 0xf),	/* SW_PREFETCH_ACCESS.* */

	INTEL_EVENT_CONSTRAINT_RANGE(0x48, 0x54, 0xf),

	INTEL_EVENT_CONSTRAINT_RANGE(0x48, 0x56, 0xf),

	INTEL_EVENT_CONSTRAINT_RANGE(0x60, 0x8b, 0xf),

	INTEL_UEVENT_CONSTRAINT(0x04a3, 0xff),  /* CYCLE_ACTIVITY.STALLS_TOTAL */

	INTEL_UEVENT_CONSTRAINT(0x10a3, 0xff),  /* CYCLE_ACTIVITY.CYCLES_MEM_ANY */