Commit 8677858d authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
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dt-bindings: memory-controllers: freescale: add MMDC binding doc 



Freescale MMDC (Multi Mode DDR Controller) driver is supported
since i.MX6Q, but not yet documented, this patch adds binding
doc for MMDC module driver.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 20d467e1

Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.txt

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Freescale Multi Mode DDR controller (MMDC)



Required properties :

- compatible : should be one of following:

	for i.MX6Q/i.MX6DL:

	- "fsl,imx6q-mmdc";

	for i.MX6QP:

	- "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";

	for i.MX6SL:

	- "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";

	for i.MX6SLL:

	- "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc";

	for i.MX6SX:

	- "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";

	for i.MX6UL/i.MX6ULL/i.MX6ULZ:

	- "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";

	for i.MX7ULP:

	- "fsl,imx7ulp-mmdc", "fsl,imx6q-mmdc";

- reg : address and size of MMDC DDR controller registers



Optional properties :

- clocks : the clock provided by the SoC to access the MMDC registers



Example :

	mmdc0: memory-controller@21b0000 { /* MMDC0 */

		compatible = "fsl,imx6q-mmdc";

		reg = <0x021b0000 0x4000>;

		clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;

	};



	mmdc1: memory-controller@21b4000 { /* MMDC1 */

		compatible = "fsl,imx6q-mmdc";

		reg = <0x021b4000 0x4000>;

		status = "disabled";

	};