Commit 8673b8dc authored by Oliver Logush's avatar Oliver Logush Committed by Alex Deucher
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drm/amd/display: Add an extra check for dcn10 OPTC data format

parent 75969362
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+0 −6
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@@ -62,12 +62,6 @@

#define CURSOR0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT	0x4
#define CURSOR0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK		0x00000010L
#define CURSOR1_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT	0x4
#define CURSOR1_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK		0x00000010L
#define CURSOR2_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT	0x4
#define CURSOR2_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK		0x00000010L
#define CURSOR3_CURSOR_CONTROL__CURSOR_2X_MAGNIFY__SHIFT	0x4
#define CURSOR3_CURSOR_CONTROL__CURSOR_2X_MAGNIFY_MASK		0x00000010L

#define IPP_SF(reg_name, field_name, post_fix)\
	.field_name = reg_name ## __ ## field_name ## post_fix
+1 −1
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@@ -304,7 +304,7 @@ void optc1_program_timing(
	if (optc1_is_two_pixels_per_containter(&patched_crtc_timing) || optc1->opp_count == 2)
		h_div = H_TIMING_DIV_BY2;

	if (REG(OPTC_DATA_FORMAT_CONTROL)) {
	if (REG(OPTC_DATA_FORMAT_CONTROL) && optc1->tg_mask->OPTC_DATA_FORMAT != 0) {
		uint32_t data_fmt = 0;

		if (patched_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
+0 −1
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@@ -171,7 +171,6 @@ struct dwbc {
	bool dwb_is_efc_transition;
	bool dwb_is_drc;
	int wb_src_plane_inst;/*hubp, mpcc, inst*/
	bool update_privacymask;
	uint32_t mask_id;
        int otg_inst;
        bool mvc_cfg;