Commit 8652da45 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/pm: enable runpm support over BACO for SMU13.0.0 



Enable SMU13.0.0 runpm support.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.0.x
parent f8794f31

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

+8 −0
Original line number Diff line number Diff line
@@ -1388,6 +1388,14 @@ enum smu_cmn2asic_mapping_type { 
	CMN2ASIC_MAPPING_WORKLOAD,

};



enum smu_baco_seq {

	BACO_SEQ_BACO = 0,

	BACO_SEQ_MSR,

	BACO_SEQ_BAMACO,

	BACO_SEQ_ULPS,

	BACO_SEQ_COUNT,

};



#define MSG_MAP(msg, index, valid_in_vf) \

	[SMU_MSG_##msg] = {1, (index), (valid_in_vf)}

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h

+1 −9
Original line number Diff line number Diff line
@@ -147,14 +147,6 @@ struct smu_11_5_power_context { 
	uint32_t	max_fast_ppt_limit;

};



enum smu_v11_0_baco_seq {

	BACO_SEQ_BACO = 0,

	BACO_SEQ_MSR,

	BACO_SEQ_BAMACO,

	BACO_SEQ_ULPS,

	BACO_SEQ_COUNT,

};



#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)



int smu_v11_0_init_microcode(struct smu_context *smu);
@@ -257,7 +249,7 @@ int smu_v11_0_baco_enter(struct smu_context *smu); 
int smu_v11_0_baco_exit(struct smu_context *smu);



int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu,

				      enum smu_v11_0_baco_seq baco_seq);

				      enum smu_baco_seq baco_seq);



int smu_v11_0_mode1_reset(struct smu_context *smu);

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h

+3 −8
Original line number Diff line number Diff line
@@ -124,14 +124,6 @@ struct smu_13_0_power_context { 
	enum smu_13_0_power_state power_state;

};



enum smu_v13_0_baco_seq {

	BACO_SEQ_BACO = 0,

	BACO_SEQ_MSR,

	BACO_SEQ_BAMACO,

	BACO_SEQ_ULPS,

	BACO_SEQ_COUNT,

};



#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)



int smu_v13_0_init_microcode(struct smu_context *smu);
@@ -218,6 +210,9 @@ int smu_v13_0_set_azalia_d3_pme(struct smu_context *smu); 
int smu_v13_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,

					       struct pp_smu_nv_clock_table *max_clocks);



int smu_v13_0_baco_set_armd3_sequence(struct smu_context *smu,

				      enum smu_baco_seq baco_seq);



bool smu_v13_0_baco_is_support(struct smu_context *smu);



enum smu_baco_state smu_v13_0_baco_get_state(struct smu_context *smu);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

+1 −1
Original line number Diff line number Diff line
@@ -1576,7 +1576,7 @@ int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu) 
}



int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu,

				      enum smu_v11_0_baco_seq baco_seq)

				      enum smu_baco_seq baco_seq)

{

	return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ArmD3, baco_seq, NULL);

}

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

+9 −0
Original line number Diff line number Diff line
@@ -2230,6 +2230,15 @@ int smu_v13_0_gfx_ulv_control(struct smu_context *smu, 
	return ret;

}



int smu_v13_0_baco_set_armd3_sequence(struct smu_context *smu,

				      enum smu_baco_seq baco_seq)

{

	return smu_cmn_send_smc_msg_with_param(smu,

					       SMU_MSG_ArmD3,

					       baco_seq,

					       NULL);

}



bool smu_v13_0_baco_is_support(struct smu_context *smu)

{

	struct smu_baco_context *smu_baco = &smu->smu_baco;