Commit 85af88b8 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r8a77980: Add Z2 clock 



Add support for the Z2 (Cortex-A53 System CPU) clock on R-Car V3H, which
uses a fixed SYS-CPU divider.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/aad9eaa57acf65cbe43e4d374066a72d760d54d8.1676560357.git.geert+renesas@glider.be
parent 88ddf98a

drivers/clk/renesas/r8a77980-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ static const struct cpg_core_clk r8a77980_core_clks[] __initconst = { 
	DEF_RATE(".oco",	CLK_OCO,           32768),



	/* Core Clock Outputs */

	DEF_FIXED("z2",		R8A77980_CLK_Z2,    CLK_PLL2,       4, 1),

	DEF_FIXED("ztr",	R8A77980_CLK_ZTR,   CLK_PLL1_DIV2,  6, 1),

	DEF_FIXED("ztrd2",	R8A77980_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),

	DEF_FIXED("zt",		R8A77980_CLK_ZT,    CLK_PLL1_DIV2,  4, 1),