Unverified Commit 85780eb5 authored by Mark Brown's avatar Mark Brown
Browse files

Add support of MediaTek mt8186 to SOF 

Merge series from Tinghan Shen <tinghan.shen@mediatek.com>:

Add support of MediaTek mt8186 SoC DSP to SOF.
parents e5737cce 0e0b83cc

sound/soc/sof/mediatek/Kconfig

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@@ -21,6 +21,15 @@ config SND_SOC_SOF_MTK_COMMON 
	  This option is not user-selectable but automagically handled by

	  'select' statements at a higher level



config SND_SOC_SOF_MT8186

	tristate "SOF support for MT8186 audio DSP"

	select SND_SOC_SOF_MTK_COMMON

	help

	  This adds support for Sound Open Firmware for Mediatek platforms

	  using the mt8186 processors.

	  Say Y if you have such a device.

	  If unsure select "N".



config SND_SOC_SOF_MT8195

	tristate "SOF support for MT8195 audio DSP"

	select SND_SOC_SOF_MTK_COMMON

sound/soc/sof/mediatek/Makefile

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)

obj-$(CONFIG_SND_SOC_SOF_MT8195) += mt8195/

obj-$(CONFIG_SND_SOC_SOF_MT8186) += mt8186/

sound/soc/sof/mediatek/adsp_helper.h

+8 −0
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@@ -29,6 +29,14 @@ struct mtk_adsp_chip_info { 
	void __iomem *shared_dram; /* part of  va_dram */

	phys_addr_t adsp_bootup_addr;

	int dram_offset; /*dram offset between system and dsp view*/



	phys_addr_t pa_secreg;

	u32 secregsize;

	void __iomem *va_secreg;



	phys_addr_t pa_busreg;

	u32 busregsize;

	void __iomem *va_busreg;

};



struct adsp_priv {

sound/soc/sof/mediatek/mt8186/Makefile

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)

snd-sof-mt8186-objs := mt8186.o mt8186-clk.o mt8186-loader.o

obj-$(CONFIG_SND_SOC_SOF_MT8186) += snd-sof-mt8186.o

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)

//

// Copyright(c) 2022 Mediatek Corporation. All rights reserved.

//

// Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

//         Tinghan Shen <tinghan.shen@mediatek.com>

//

// Hardware interface for mt8186 DSP clock



#include <linux/clk.h>

#include <linux/pm_runtime.h>

#include <linux/io.h>



#include "../../sof-audio.h"

#include "../../ops.h"

#include "../adsp_helper.h"

#include "mt8186.h"

#include "mt8186-clk.h"



static const char *adsp_clks[ADSP_CLK_MAX] = {

	[CLK_TOP_AUDIODSP] = "audiodsp_sel",

	[CLK_TOP_ADSP_BUS] = "adsp_bus_sel",

};



int mt8186_adsp_init_clock(struct snd_sof_dev *sdev)

{

	struct adsp_priv *priv = sdev->pdata->hw_pdata;

	struct device *dev = sdev->dev;

	int i;



	priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);

	if (!priv->clk)

		return -ENOMEM;



	for (i = 0; i < ADSP_CLK_MAX; i++) {

		priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);



		if (IS_ERR(priv->clk[i]))

			return PTR_ERR(priv->clk[i]);

	}



	return 0;

}



static int adsp_enable_all_clock(struct snd_sof_dev *sdev)

{

	struct adsp_priv *priv = sdev->pdata->hw_pdata;

	struct device *dev = sdev->dev;

	int ret;



	ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIODSP]);

	if (ret) {

		dev_err(dev, "%s clk_prepare_enable(audiodsp) fail %d\n",

			__func__, ret);

		return ret;

	}



	ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP_BUS]);

	if (ret) {

		dev_err(dev, "%s clk_prepare_enable(adsp_bus) fail %d\n",

			__func__, ret);

		clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]);

		return ret;

	}



	return 0;

}



static void adsp_disable_all_clock(struct snd_sof_dev *sdev)

{

	struct adsp_priv *priv = sdev->pdata->hw_pdata;



	clk_disable_unprepare(priv->clk[CLK_TOP_ADSP_BUS]);

	clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]);

}



int adsp_clock_on(struct snd_sof_dev *sdev)

{

	struct device *dev = sdev->dev;

	int ret;



	ret = adsp_enable_all_clock(sdev);

	if (ret) {

		dev_err(dev, "failed to adsp_enable_clock: %d\n", ret);

		return ret;

	}

	snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_CK_EN,

			  UART_EN | DMA_EN | TIMER_EN | COREDBG_EN | CORE_CLK_EN);

	snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_UART_CTRL,

			  UART_BCLK_CG | UART_RSTN);



	return 0;

}



void adsp_clock_off(struct snd_sof_dev *sdev)

{

	snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_CK_EN, 0);

	snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_UART_CTRL, 0);

	adsp_disable_all_clock(sdev);

}