Commit 85764555 authored by Russell King's avatar Russell King Committed by David S. Miller
Browse files

net: dsa: mv88e6xxx: convert 88e6352 to phylink_pcs 



Convert the 88E6352 SERDES code to use the phylink_pcs infrastructure.

Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4aabe35c

drivers/net/dsa/mv88e6xxx/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ mv88e6xxx-objs += global2_avb.o 
mv88e6xxx-objs += global2_scratch.o

mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += hwtstamp.o

mv88e6xxx-objs += pcs-6185.o

mv88e6xxx-objs += pcs-6352.o

mv88e6xxx-objs += phy.o

mv88e6xxx-objs += port.o

mv88e6xxx-objs += port_hidden.o

drivers/net/dsa/mv88e6xxx/chip.c

+4 −30
Original line number Diff line number Diff line
@@ -4614,16 +4614,11 @@ static const struct mv88e6xxx_ops mv88e6172_ops = { 
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.stu_getnext = mv88e6352_g1_stu_getnext,

	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,

	.serdes_get_lane = mv88e6352_serdes_get_lane,

	.serdes_pcs_get_state = mv88e6352_serdes_pcs_get_state,

	.serdes_pcs_config = mv88e6352_serdes_pcs_config,

	.serdes_pcs_an_restart = mv88e6352_serdes_pcs_an_restart,

	.serdes_pcs_link_up = mv88e6352_serdes_pcs_link_up,

	.serdes_power = mv88e6352_serdes_power,

	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,

	.serdes_get_regs = mv88e6352_serdes_get_regs,

	.gpio_ops = &mv88e6352_gpio_ops,

	.phylink_get_caps = mv88e6352_phylink_get_caps,

	.pcs_ops = &mv88e6352_pcs_ops,

};



static const struct mv88e6xxx_ops mv88e6175_ops = {
@@ -4719,20 +4714,13 @@ static const struct mv88e6xxx_ops mv88e6176_ops = { 
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.stu_getnext = mv88e6352_g1_stu_getnext,

	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,

	.serdes_get_lane = mv88e6352_serdes_get_lane,

	.serdes_pcs_get_state = mv88e6352_serdes_pcs_get_state,

	.serdes_pcs_config = mv88e6352_serdes_pcs_config,

	.serdes_pcs_an_restart = mv88e6352_serdes_pcs_an_restart,

	.serdes_pcs_link_up = mv88e6352_serdes_pcs_link_up,

	.serdes_power = mv88e6352_serdes_power,

	.serdes_irq_mapping = mv88e6352_serdes_irq_mapping,

	.serdes_irq_enable = mv88e6352_serdes_irq_enable,

	.serdes_irq_status = mv88e6352_serdes_irq_status,

	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,

	.serdes_get_regs = mv88e6352_serdes_get_regs,

	.serdes_set_tx_amplitude = mv88e6352_serdes_set_tx_amplitude,

	.gpio_ops = &mv88e6352_gpio_ops,

	.phylink_get_caps = mv88e6352_phylink_get_caps,

	.pcs_ops = &mv88e6352_pcs_ops,

};



static const struct mv88e6xxx_ops mv88e6185_ops = {
@@ -5014,15 +5002,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { 
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.stu_getnext = mv88e6352_g1_stu_getnext,

	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,

	.serdes_get_lane = mv88e6352_serdes_get_lane,

	.serdes_pcs_get_state = mv88e6352_serdes_pcs_get_state,

	.serdes_pcs_config = mv88e6352_serdes_pcs_config,

	.serdes_pcs_an_restart = mv88e6352_serdes_pcs_an_restart,

	.serdes_pcs_link_up = mv88e6352_serdes_pcs_link_up,

	.serdes_power = mv88e6352_serdes_power,

	.serdes_irq_mapping = mv88e6352_serdes_irq_mapping,

	.serdes_irq_enable = mv88e6352_serdes_irq_enable,

	.serdes_irq_status = mv88e6352_serdes_irq_status,

	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,

	.serdes_get_regs = mv88e6352_serdes_get_regs,

	.serdes_set_tx_amplitude = mv88e6352_serdes_set_tx_amplitude,
@@ -5030,6 +5010,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { 
	.avb_ops = &mv88e6352_avb_ops,

	.ptp_ops = &mv88e6352_ptp_ops,

	.phylink_get_caps = mv88e6352_phylink_get_caps,

	.pcs_ops = &mv88e6352_pcs_ops,

};



static const struct mv88e6xxx_ops mv88e6250_ops = {
@@ -5445,15 +5426,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { 
	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.stu_getnext = mv88e6352_g1_stu_getnext,

	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,

	.serdes_get_lane = mv88e6352_serdes_get_lane,

	.serdes_pcs_get_state = mv88e6352_serdes_pcs_get_state,

	.serdes_pcs_config = mv88e6352_serdes_pcs_config,

	.serdes_pcs_an_restart = mv88e6352_serdes_pcs_an_restart,

	.serdes_pcs_link_up = mv88e6352_serdes_pcs_link_up,

	.serdes_power = mv88e6352_serdes_power,

	.serdes_irq_mapping = mv88e6352_serdes_irq_mapping,

	.serdes_irq_enable = mv88e6352_serdes_irq_enable,

	.serdes_irq_status = mv88e6352_serdes_irq_status,

	.gpio_ops = &mv88e6352_gpio_ops,

	.avb_ops = &mv88e6352_avb_ops,

	.ptp_ops = &mv88e6352_ptp_ops,
@@ -5464,6 +5437,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { 
	.serdes_get_regs = mv88e6352_serdes_get_regs,

	.serdes_set_tx_amplitude = mv88e6352_serdes_set_tx_amplitude,

	.phylink_get_caps = mv88e6352_phylink_get_caps,

	.pcs_ops = &mv88e6352_pcs_ops,

};



static const struct mv88e6xxx_ops mv88e6390_ops = {

drivers/net/dsa/mv88e6xxx/pcs-6352.c

0 → 100644
+390 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-or-later

/*

 * Marvell 88E6352 family SERDES PCS support

 *

 * Copyright (c) 2008 Marvell Semiconductor

 *

 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>

 */

#include <linux/phylink.h>



#include "global2.h"

#include "port.h"

#include "serdes.h"



/* Definitions from drivers/net/phy/marvell.c, which would be good to reuse. */

#define MII_M1011_PHY_STATUS		17

#define MII_M1011_IMASK			18

#define MII_M1011_IMASK_LINK_CHANGE	BIT(10)

#define MII_M1011_IEVENT		19

#define MII_M1011_IEVENT_LINK_CHANGE	BIT(10)

#define MII_MARVELL_PHY_PAGE		22

#define MII_MARVELL_FIBER_PAGE		1



struct marvell_c22_pcs {

	struct mdio_device mdio;

	struct phylink_pcs phylink_pcs;

	unsigned int irq;

	char name[64];

	bool (*link_check)(struct marvell_c22_pcs *mpcs);

	struct mv88e6xxx_port *port;

};



static struct marvell_c22_pcs *pcs_to_marvell_c22_pcs(struct phylink_pcs *pcs)

{

	return container_of(pcs, struct marvell_c22_pcs, phylink_pcs);

}



static int marvell_c22_pcs_set_fiber_page(struct marvell_c22_pcs *mpcs)

{

	u16 page;

	int err;



	mutex_lock(&mpcs->mdio.bus->mdio_lock);



	err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE);

	if (err < 0) {

		dev_err(mpcs->mdio.dev.parent,

			"%s: can't read Serdes page register: %pe\n",

			mpcs->name, ERR_PTR(err));

		return err;

	}



	page = err;



	err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,

			      MII_MARVELL_FIBER_PAGE);

	if (err) {

		dev_err(mpcs->mdio.dev.parent,

			"%s: can't set Serdes page register: %pe\n",

			mpcs->name, ERR_PTR(err));

		return err;

	}



	return page;

}



static int marvell_c22_pcs_restore_page(struct marvell_c22_pcs *mpcs,

					int oldpage, int ret)

{

	int err;



	if (oldpage >= 0) {

		err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,

				      oldpage);

		if (err)

			dev_err(mpcs->mdio.dev.parent,

				"%s: can't restore Serdes page register: %pe\n",

				mpcs->name, ERR_PTR(err));

		if (!err || ret < 0)

			err = ret;

	} else {

		err = oldpage;

	}

	mutex_unlock(&mpcs->mdio.bus->mdio_lock);



	return err;

}



static irqreturn_t marvell_c22_pcs_handle_irq(int irq, void *dev_id)

{

	struct marvell_c22_pcs *mpcs = dev_id;

	irqreturn_t status = IRQ_NONE;

	int err, oldpage;



	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);

	if (oldpage < 0)

		goto fail;



	err = __mdiodev_read(&mpcs->mdio, MII_M1011_IEVENT);

	if (err >= 0 && err & MII_M1011_IEVENT_LINK_CHANGE) {

		phylink_pcs_change(&mpcs->phylink_pcs, true);

		status = IRQ_HANDLED;

	}



fail:

	marvell_c22_pcs_restore_page(mpcs, oldpage, 0);



	return status;

}



static int marvell_c22_pcs_modify(struct marvell_c22_pcs *mpcs, u8 reg,

				  u16 mask, u16 val)

{

	int oldpage, err = 0;



	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);

	if (oldpage >= 0)

		err = __mdiodev_modify(&mpcs->mdio, reg, mask, val);



	return marvell_c22_pcs_restore_page(mpcs, oldpage, err);

}



static int marvell_c22_pcs_power(struct marvell_c22_pcs *mpcs,

				 bool on)

{

	u16 val = on ? 0 : BMCR_PDOWN;



	return marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_PDOWN, val);

}



static int marvell_c22_pcs_control_irq(struct marvell_c22_pcs *mpcs,

				       bool enable)

{

	u16 val = enable ? MII_M1011_IMASK_LINK_CHANGE : 0;



	return marvell_c22_pcs_modify(mpcs, MII_M1011_IMASK,

				      MII_M1011_IMASK_LINK_CHANGE, val);

}



static int marvell_c22_pcs_enable(struct phylink_pcs *pcs)

{

	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);

	int err;



	err = marvell_c22_pcs_power(mpcs, true);

	if (err)

		return err;



	return marvell_c22_pcs_control_irq(mpcs, !!mpcs->irq);

}



static void marvell_c22_pcs_disable(struct phylink_pcs *pcs)

{

	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);



	marvell_c22_pcs_control_irq(mpcs, false);

	marvell_c22_pcs_power(mpcs, false);

}



static void marvell_c22_pcs_get_state(struct phylink_pcs *pcs,

				      struct phylink_link_state *state)

{

	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);

	int oldpage, bmsr, lpa, status;



	state->link = false;



	if (mpcs->link_check && !mpcs->link_check(mpcs))

		return;



	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);

	if (oldpage >= 0) {

		bmsr = __mdiodev_read(&mpcs->mdio, MII_BMSR);

		lpa = __mdiodev_read(&mpcs->mdio, MII_LPA);

		status = __mdiodev_read(&mpcs->mdio, MII_M1011_PHY_STATUS);

	}



	if (marvell_c22_pcs_restore_page(mpcs, oldpage, 0) >= 0 &&

	    bmsr >= 0 && lpa >= 0 && status >= 0)

		mv88e6xxx_pcs_decode_state(mpcs->mdio.dev.parent, bmsr, lpa,

					   status, state);

}



static int marvell_c22_pcs_config(struct phylink_pcs *pcs,

				  unsigned int neg_mode,

				  phy_interface_t interface,

				  const unsigned long *advertising,

				  bool permit_pause_to_mac)

{

	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);

	int oldpage, adv, err, ret = 0;

	u16 bmcr;



	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);

	if (adv < 0)

		return 0;



	bmcr = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE : 0;



	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);

	if (oldpage < 0)

		goto restore;



	err = __mdiodev_modify_changed(&mpcs->mdio, MII_ADVERTISE, 0xffff, adv);

	ret = err;

	if (err < 0)

		goto restore;



	err = __mdiodev_modify_changed(&mpcs->mdio, MII_BMCR, BMCR_ANENABLE,

				       bmcr);

	if (err < 0) {

		ret = err;

		goto restore;

	}



	/* If the ANENABLE bit was changed, the PHY will restart negotiation,

	 * so we don't need to flag a change to trigger its own restart.

	 */

	if (err)

		ret = 0;



restore:

	return marvell_c22_pcs_restore_page(mpcs, oldpage, ret);

}



static void marvell_c22_pcs_an_restart(struct phylink_pcs *pcs)

{

	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);



	marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_ANRESTART, BMCR_ANRESTART);

}



static void marvell_c22_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,

				    phy_interface_t interface, int speed,

				    int duplex)

{

	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);

	u16 bmcr;

	int err;



	if (phylink_autoneg_inband(mode))

		return;



	bmcr = mii_bmcr_encode_fixed(speed, duplex);



	err = marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_SPEED100 |

				     BMCR_FULLDPLX | BMCR_SPEED1000, bmcr);

	if (err)

		dev_err(mpcs->mdio.dev.parent,

			"%s: failed to configure mpcs: %pe\n", mpcs->name,

			ERR_PTR(err));

}



static const struct phylink_pcs_ops marvell_c22_pcs_ops = {

	.pcs_enable = marvell_c22_pcs_enable,

	.pcs_disable = marvell_c22_pcs_disable,

	.pcs_get_state = marvell_c22_pcs_get_state,

	.pcs_config = marvell_c22_pcs_config,

	.pcs_an_restart = marvell_c22_pcs_an_restart,

	.pcs_link_up = marvell_c22_pcs_link_up,

};



static struct marvell_c22_pcs *marvell_c22_pcs_alloc(struct device *dev,

						     struct mii_bus *bus,

						     unsigned int addr)

{

	struct marvell_c22_pcs *mpcs;



	mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);

	if (!mpcs)

		return NULL;



	mpcs->mdio.dev.parent = dev;

	mpcs->mdio.bus = bus;

	mpcs->mdio.addr = addr;

	mpcs->phylink_pcs.ops = &marvell_c22_pcs_ops;

	mpcs->phylink_pcs.neg_mode = true;



	return mpcs;

}



static int marvell_c22_pcs_setup_irq(struct marvell_c22_pcs *mpcs,

				     unsigned int irq)

{

	int err;



	mpcs->phylink_pcs.poll = !irq;

	mpcs->irq = irq;



	if (irq) {

		err = request_threaded_irq(irq, NULL,

					   marvell_c22_pcs_handle_irq,

					   IRQF_ONESHOT, mpcs->name, mpcs);

		if (err)

			return err;

	}



	return 0;

}



/* mv88e6352 specifics */



static bool mv88e6352_pcs_link_check(struct marvell_c22_pcs *mpcs)

{

	struct mv88e6xxx_port *port = mpcs->port;

	struct mv88e6xxx_chip *chip = port->chip;

	u8 cmode;



	/* Port 4 can be in auto-media mode. Check that the port is

	 * associated with the mpcs.

	 */

	mv88e6xxx_reg_lock(chip);

	chip->info->ops->port_get_cmode(chip, port->port, &cmode);

	mv88e6xxx_reg_unlock(chip);



	return cmode == MV88E6XXX_PORT_STS_CMODE_100BASEX ||

	       cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||

	       cmode == MV88E6XXX_PORT_STS_CMODE_SGMII;

}



static int mv88e6352_pcs_init(struct mv88e6xxx_chip *chip, int port)

{

	struct marvell_c22_pcs *mpcs;

	struct mii_bus *bus;

	struct device *dev;

	unsigned int irq;

	int err;



	mv88e6xxx_reg_lock(chip);

	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);

	mv88e6xxx_reg_unlock(chip);

	if (err <= 0)

		return err;



	irq = mv88e6xxx_serdes_irq_mapping(chip, port);

	bus = mv88e6xxx_default_mdio_bus(chip);

	dev = chip->dev;



	mpcs = marvell_c22_pcs_alloc(dev, bus, MV88E6352_ADDR_SERDES);

	if (!mpcs)

		return -ENOMEM;



	snprintf(mpcs->name, sizeof(mpcs->name),

		 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port);



	mpcs->link_check = mv88e6352_pcs_link_check;

	mpcs->port = &chip->ports[port];



	err = marvell_c22_pcs_setup_irq(mpcs, irq);

	if (err) {

		kfree(mpcs);

		return err;

	}



	chip->ports[port].pcs_private = &mpcs->phylink_pcs;



	return 0;

}



static void mv88e6352_pcs_teardown(struct mv88e6xxx_chip *chip, int port)

{

	struct marvell_c22_pcs *mpcs;

	struct phylink_pcs *pcs;



	pcs = chip->ports[port].pcs_private;

	if (!pcs)

		return;



	mpcs = pcs_to_marvell_c22_pcs(pcs);



	if (mpcs->irq)

		free_irq(mpcs->irq, mpcs);



	kfree(mpcs);



	chip->ports[port].pcs_private = NULL;

}



static struct phylink_pcs *mv88e6352_pcs_select(struct mv88e6xxx_chip *chip,

						int port,

						phy_interface_t interface)

{

	return chip->ports[port].pcs_private;

}



const struct mv88e6xxx_pcs_ops mv88e6352_pcs_ops = {

	.pcs_init = mv88e6352_pcs_init,

	.pcs_teardown = mv88e6352_pcs_teardown,

	.pcs_select = mv88e6352_pcs_select,

};

drivers/net/dsa/mv88e6xxx/serdes.c

+0 −205
Original line number Diff line number Diff line
@@ -39,12 +39,6 @@ static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip, 
	return mv88e6xxx_phy_read_c45(chip, lane, device, reg, val);

}



static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,

				  int lane, int device, int reg, u16 val)

{

	return mv88e6xxx_phy_write_c45(chip, lane, device, reg, val);

}



int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa,

			       u16 status, struct phylink_link_state *state)

{
@@ -116,160 +110,6 @@ int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa, 
	return 0;

}



int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,

			   bool up)

{

	u16 val, new_val;

	int err;



	err = mv88e6352_serdes_read(chip, MII_BMCR, &val);

	if (err)

		return err;



	if (up)

		new_val = val & ~BMCR_PDOWN;

	else

		new_val = val | BMCR_PDOWN;



	if (val != new_val)

		err = mv88e6352_serdes_write(chip, MII_BMCR, new_val);



	return err;

}



int mv88e6352_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,

				int lane, unsigned int mode,

				phy_interface_t interface,

				const unsigned long *advertise)

{

	u16 adv, bmcr, val;

	bool changed;

	int err;



	switch (interface) {

	case PHY_INTERFACE_MODE_SGMII:

		adv = 0x0001;

		break;



	case PHY_INTERFACE_MODE_1000BASEX:

		adv = linkmode_adv_to_mii_adv_x(advertise,

					ETHTOOL_LINK_MODE_1000baseX_Full_BIT);

		break;



	default:

		return 0;

	}



	err = mv88e6352_serdes_read(chip, MII_ADVERTISE, &val);

	if (err)

		return err;



	changed = val != adv;

	if (changed) {

		err = mv88e6352_serdes_write(chip, MII_ADVERTISE, adv);

		if (err)

			return err;

	}



	err = mv88e6352_serdes_read(chip, MII_BMCR, &val);

	if (err)

		return err;



	if (phylink_autoneg_inband(mode))

		bmcr = val | BMCR_ANENABLE;

	else

		bmcr = val & ~BMCR_ANENABLE;



	if (bmcr == val)

		return changed;



	return mv88e6352_serdes_write(chip, MII_BMCR, bmcr);

}



int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,

				   int lane, struct phylink_link_state *state)

{

	u16 bmsr, lpa, status;

	int err;



	err = mv88e6352_serdes_read(chip, MII_BMSR, &bmsr);

	if (err) {

		dev_err(chip->dev, "can't read Serdes PHY BMSR: %d\n", err);

		return err;

	}



	err = mv88e6352_serdes_read(chip, 0x11, &status);

	if (err) {

		dev_err(chip->dev, "can't read Serdes PHY status: %d\n", err);

		return err;

	}



	err = mv88e6352_serdes_read(chip, MII_LPA, &lpa);

	if (err) {

		dev_err(chip->dev, "can't read Serdes PHY LPA: %d\n", err);

		return err;

	}



	return mv88e6xxx_pcs_decode_state(chip->dev, bmsr, lpa, status, state);

}



int mv88e6352_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,

				    int lane)

{

	u16 bmcr;

	int err;



	err = mv88e6352_serdes_read(chip, MII_BMCR, &bmcr);

	if (err)

		return err;



	return mv88e6352_serdes_write(chip, MII_BMCR, bmcr | BMCR_ANRESTART);

}



int mv88e6352_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port,

				 int lane, int speed, int duplex)

{

	u16 val, bmcr;

	int err;



	err = mv88e6352_serdes_read(chip, MII_BMCR, &val);

	if (err)

		return err;



	bmcr = val & ~(BMCR_SPEED100 | BMCR_FULLDPLX | BMCR_SPEED1000);

	switch (speed) {

	case SPEED_1000:

		bmcr |= BMCR_SPEED1000;

		break;

	case SPEED_100:

		bmcr |= BMCR_SPEED100;

		break;

	case SPEED_10:

		break;

	}



	if (duplex == DUPLEX_FULL)

		bmcr |= BMCR_FULLDPLX;



	if (bmcr == val)

		return 0;



	return mv88e6352_serdes_write(chip, MII_BMCR, bmcr);

}



int mv88e6352_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)

{

	u8 cmode = chip->ports[port].cmode;

	int lane = -ENODEV;



	if ((cmode == MV88E6XXX_PORT_STS_CMODE_100BASEX) ||

	    (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX) ||

	    (cmode == MV88E6XXX_PORT_STS_CMODE_SGMII))

		lane = 0xff; /* Unused */



	return lane;

}



struct mv88e6352_serdes_hw_stat {

	char string[ETH_GSTRING_LEN];

	int sizeof_stat;
@@ -362,51 +202,6 @@ int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port, 
	return ARRAY_SIZE(mv88e6352_serdes_hw_stats);

}



static void mv88e6352_serdes_irq_link(struct mv88e6xxx_chip *chip, int port)

{

	u16 bmsr;

	int err;



	/* If the link has dropped, we want to know about it. */

	err = mv88e6352_serdes_read(chip, MII_BMSR, &bmsr);

	if (err) {

		dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err);

		return;

	}



	dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS));

}



irqreturn_t mv88e6352_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,

					int lane)

{

	irqreturn_t ret = IRQ_NONE;

	u16 status;

	int err;



	err = mv88e6352_serdes_read(chip, MV88E6352_SERDES_INT_STATUS, &status);

	if (err)

		return ret;



	if (status & MV88E6352_SERDES_INT_LINK_CHANGE) {

		ret = IRQ_HANDLED;

		mv88e6352_serdes_irq_link(chip, port);

	}



	return ret;

}



int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,

				bool enable)

{

	u16 val = 0;



	if (enable)

		val |= MV88E6352_SERDES_INT_LINK_CHANGE;



	return mv88e6352_serdes_write(chip, MV88E6352_SERDES_INT_ENABLE, val);

}



unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)

{

	return irq_find_mapping(chip->g2_irq.domain, MV88E6352_SERDES_IRQ);

drivers/net/dsa/mv88e6xxx/serdes.h

+1 −17
Original line number Diff line number Diff line
@@ -113,51 +113,34 @@ int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa, 
			       u16 status, struct phylink_link_state *state);



int mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);

int mv88e6352_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);

int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);

int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);

int mv88e6393x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);

int mv88e6352_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,

				int lane, unsigned int mode,

				phy_interface_t interface,

				const unsigned long *advertise);

int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,

				int lane, unsigned int mode,

				phy_interface_t interface,

				const unsigned long *advertise);

int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,

				   int lane, struct phylink_link_state *state);

int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,

				   int lane, struct phylink_link_state *state);

int mv88e6393x_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,

				    int lane, struct phylink_link_state *state);

int mv88e6352_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,

				    int lane);

int mv88e6390_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,

				    int lane);

int mv88e6352_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port,

				 int lane, int speed, int duplex);

int mv88e6390_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port,

				 int lane, int speed, int duplex);

unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip,

					  int port);

unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip,

					  int port);

int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,

			   bool on);

int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,

			   bool on);

int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,

			    bool on);

int mv88e6393x_serdes_setup_errata(struct mv88e6xxx_chip *chip);

int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,

				bool enable);

int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, int lane,

				bool enable);

int mv88e6393x_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port,

				 int lane, bool enable);

irqreturn_t mv88e6352_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,

					int lane);

irqreturn_t mv88e6390_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,

					int lane);

irqreturn_t mv88e6393x_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
@@ -246,5 +229,6 @@ mv88e6xxx_serdes_irq_status(struct mv88e6xxx_chip *chip, int port, int lane) 
}



extern const struct mv88e6xxx_pcs_ops mv88e6185_pcs_ops;

extern const struct mv88e6xxx_pcs_ops mv88e6352_pcs_ops;



#endif