Commit 85751a8a authored by Vasant Hegde's avatar Vasant Hegde Committed by Joerg Roedel
Browse files

iommu/amd: Fix DTE_IRQ_PHYS_ADDR_MASK macro 



Interrupt Table Root Pointer is 52 bit and table must be aligned to start
on a 128-byte boundary. Hence first 6 bits are ignored.

Current code uses address mask as 45 instead of 46bit. Use GENMASK_ULL
macro instead of manually generating address mask.

Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJerry Snitselaar <jsnitsel@redhat.com>
Link: https://lore.kernel.org/r/20230609090327.5923-1-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 1ce018df

drivers/iommu/amd/amd_iommu_types.h

+1 −1
Original line number Diff line number Diff line
@@ -284,7 +284,7 @@ 
#define AMD_IOMMU_PGSIZES_V2	(PAGE_SIZE | (1ULL << 21) | (1ULL << 30))



/* Bit value definition for dte irq remapping fields*/

#define DTE_IRQ_PHYS_ADDR_MASK	(((1ULL << 45)-1) << 6)

#define DTE_IRQ_PHYS_ADDR_MASK		GENMASK_ULL(51, 6)

#define DTE_IRQ_REMAP_INTCTL_MASK	(0x3ULL << 60)

#define DTE_IRQ_REMAP_INTCTL    (2ULL << 60)

#define DTE_IRQ_REMAP_ENABLE    1ULL