Commit 856c7986 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'qcom-clk-for-5.19' of... 

Merge tag 'qcom-clk-for-5.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom

Pull Qualcomm clock driver updates from Bjorn Andersson:

This introduces the LPASS clock controller driver for sc7280 and the
global clock controller for SC8280XP.

It adds modem reset, corrects RPM clocks and moves to floor ops for SDCC
on MSM8976. It introduces clocks needed to operate the Sensor Subsystem
in MSM8998.

It enhances the logic for parked shared RCG2s, to avoid problems on
recent platforms. And lastly it introduces a new mechanism for handling
the PCIe pipe_clk, which also needs to be parked on a safe source when
the PHY is turned off.

* tag 'qcom-clk-for-5.19' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  clk: qcom: rcg2: Cache CFG register updates for parked RCGs
  clk: qcom: add sc8280xp GCC driver
  dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings
  clk: qcom: gcc-msm8976: Add modem reset
  dt-bindings: clk: qcom: gcc-msm8976: Add modem reset
  clk: qcom: gcc-msm8976: Set floor ops for SDCC
  dt-bindings: clock: qcom,gcc-apq8064: Fix typo in compatible and split apq8084
  clk: qcom: smd: Update MSM8976 RPM clocks.
  clk: qcom: gcc-msm8998: add SSC-related clocks
  dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks
  dt-bindings: clock: qcom,rpmcc: add clocks property
  dt-bindings: clock: qcom,rpmcc: convert to dtschema
  clk: qcom: lpass: Add support for LPASS clock controller for SC7280
  dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
  clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks
  clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks
  clk: qcom: regmap-mux: add pipe clk implementation
parents 31231092 703db1f5

Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml

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@@ -20,12 +20,10 @@ description: | 
  See also:

  - dt-bindings/clock/qcom,gcc-msm8960.h

  - dt-bindings/reset/qcom,gcc-msm8960.h

  - dt-bindings/clock/qcom,gcc-apq8084.h

  - dt-bindings/reset/qcom,gcc-apq8084.h



properties:

  compatible:

    const: qcom,gcc-apq8084

    const: qcom,gcc-apq8064



  nvmem-cells:

    minItems: 1

Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8084.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Binding for APQ8084



maintainers:

  - Stephen Boyd <sboyd@kernel.org>

  - Taniya Das <quic_tdas@quicinc.com>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on APQ8084.



  See also::

  - dt-bindings/clock/qcom,gcc-apq8084.h

  - dt-bindings/reset/qcom,gcc-apq8084.h



allOf:

  - $ref: qcom,gcc.yaml#



properties:

  compatible:

    const: qcom,gcc-apq8084



required:

  - compatible



unevaluatedProperties: false



examples:

  - |

    clock-controller@fc400000 {

        compatible = "qcom,gcc-apq8084";

        reg = <0xfc400000 0x4000>;

        #clock-cells = <1>;

        #reset-cells = <1>;

        #power-domain-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller Binding for SC8280xp



maintainers:

  - Bjorn Andersson <bjorn.andersson@linaro.org>



description: |

  Qualcomm global clock control module which supports the clocks, resets and

  power domains on SC8280xp.



  See also:

  - include/dt-bindings/clock/qcom,gcc-sc8280xp.h



properties:

  compatible:

    const: qcom,gcc-sc8280xp



  clocks:

    items:

      - description: XO reference clock

      - description: Sleep clock

      - description: UFS memory first RX symbol clock

      - description: UFS memory second RX symbol clock

      - description: UFS memory first TX symbol clock

      - description: UFS card first RX symbol clock

      - description: UFS card second RX symbol clock

      - description: UFS card first TX symbol clock

      - description: Primary USB SuperSpeed pipe clock

      - description: USB4 PHY pipegmux clock source

      - description: USB4 PHY DP gmux clock source

      - description: USB4 PHY sys piegmux clock source

      - description: USB4 PHY PCIe pipe clock

      - description: USB4 PHY router max pipe clock

      - description: Primary USB4 RX0 clock

      - description: Primary USB4 RX1 clock

      - description: Secondary USB SuperSpeed pipe clock

      - description: Second USB4 PHY pipegmux clock source

      - description: Second USB4 PHY DP gmux clock source

      - description: Second USB4 PHY sys pipegmux clock source

      - description: Second USB4 PHY PCIe pipe clock

      - description: Second USB4 PHY router max pipe clock

      - description: Secondary USB4 RX0 clock

      - description: Secondary USB4 RX1 clock

      - description: Multiport USB first SupserSpeed pipe clock

      - description: Multiport USB second SuperSpeed pipe clock

      - description: PCIe 2a pipe clock

      - description: PCIe 2b pipe clock

      - description: PCIe 3a pipe clock

      - description: PCIe 3b pipe clock

      - description: PCIe 4 pipe clock

      - description: First EMAC controller reference clock

      - description: Second EMAC controller reference clock



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



  protected-clocks:

    maxItems: 389



required:

  - compatible

  - clocks

  - reg

  - '#clock-cells'

  - '#reset-cells'

  - '#power-domain-cells'



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    clock-controller@100000 {

      compatible = "qcom,gcc-sc8280xp";

      reg = <0x00100000 0x1f0000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>,

               <&sleep_clk>,

               <&ufs_phy_rx_symbol_0_clk>,

               <&ufs_phy_rx_symbol_1_clk>,

               <&ufs_phy_tx_symbol_0_clk>,

               <&ufs_card_rx_symbol_0_clk>,

               <&ufs_card_rx_symbol_1_clk>,

               <&ufs_card_tx_symbol_0_clk>,

               <&usb_0_ssphy>,

               <&gcc_usb4_phy_pipegmux_clk_src>,

               <&gcc_usb4_phy_dp_gmux_clk_src>,

               <&gcc_usb4_phy_sys_pipegmux_clk_src>,

               <&usb4_phy_gcc_usb4_pcie_pipe_clk>,

               <&usb4_phy_gcc_usb4rtr_max_pipe_clk>,

               <&qusb4phy_gcc_usb4_rx0_clk>,

               <&qusb4phy_gcc_usb4_rx1_clk>,

               <&usb_1_ssphy>,

               <&gcc_usb4_1_phy_pipegmux_clk_src>,

               <&gcc_usb4_1_phy_dp_gmux_clk_src>,

               <&gcc_usb4_1_phy_sys_pipegmux_clk_src>,

               <&usb4_1_phy_gcc_usb4_pcie_pipe_clk>,

               <&usb4_1_phy_gcc_usb4rtr_max_pipe_clk>,

               <&qusb4phy_1_gcc_usb4_rx0_clk>,

               <&qusb4phy_1_gcc_usb4_rx1_clk>,

               <&usb_2_ssphy>,

               <&usb_3_ssphy>,

               <&pcie2a_lane>,

               <&pcie2b_lane>,

               <&pcie3a_lane>,

               <&pcie3b_lane>,

               <&pcie4_lane>,

               <&rxc0_ref_clk>,

               <&rxc1_ref_clk>;



      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/qcom,rpmcc.txt

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Qualcomm RPM Clock Controller Binding

------------------------------------------------

The RPM is a dedicated hardware engine for managing the shared

SoC resources in order to keep the lowest power profile. It

communicates with other hardware subsystems via shared memory

and accepts clock requests, aggregates the requests and turns

the clocks on/off or scales them on demand.



Required properties :

- compatible : shall contain only one of the following. The generic

               compatible "qcom,rpmcc" should be also included.



			"qcom,rpmcc-mdm9607", "qcom,rpmcc"

			"qcom,rpmcc-msm8660", "qcom,rpmcc"

			"qcom,rpmcc-apq8060", "qcom,rpmcc"

			"qcom,rpmcc-msm8226", "qcom,rpmcc"

			"qcom,rpmcc-msm8916", "qcom,rpmcc"

			"qcom,rpmcc-msm8936", "qcom,rpmcc"

			"qcom,rpmcc-msm8953", "qcom,rpmcc"

			"qcom,rpmcc-msm8974", "qcom,rpmcc"

			"qcom,rpmcc-msm8976", "qcom,rpmcc"

			"qcom,rpmcc-apq8064", "qcom,rpmcc"

			"qcom,rpmcc-ipq806x", "qcom,rpmcc"

			"qcom,rpmcc-msm8992",·"qcom,rpmcc"

			"qcom,rpmcc-msm8994",·"qcom,rpmcc"

			"qcom,rpmcc-msm8996", "qcom,rpmcc"

			"qcom,rpmcc-msm8998", "qcom,rpmcc"

			"qcom,rpmcc-qcm2290", "qcom,rpmcc"

			"qcom,rpmcc-qcs404", "qcom,rpmcc"

			"qcom,rpmcc-sdm660", "qcom,rpmcc"

			"qcom,rpmcc-sm6115", "qcom,rpmcc"

			"qcom,rpmcc-sm6125", "qcom,rpmcc"



- #clock-cells : shall contain 1



The clock enumerators are defined in <dt-bindings/clock/qcom,rpmcc.h>

and come in pairs: FOO_CLK followed by FOO_A_CLK. The latter clock

is an "active" clock, which means that the consumer only care that the

clock is available when the apps CPU subsystem is active, i.e. not

suspended or in deep idle. If it is important that the clock keeps running

during system suspend, you need to specify the non-active clock, the one

not containing *_A_* in the enumerator name.



Example:

	smd {

		compatible = "qcom,smd";



		rpm {

			interrupts = <0 168 1>;

			qcom,ipc = <&apcs 8 0>;

			qcom,smd-edge = <15>;



			rpm_requests {

				compatible = "qcom,rpm-msm8916";

				qcom,smd-channels = "rpm_requests";



				rpmcc: clock-controller {

					compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";

					#clock-cells = <1>;

				};

			};

		};

	};

Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,rpmcc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm RPM Clock Controller



maintainers:

  - Bjorn Andersson <bjorn.andersson@linaro.org>

  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>



description: |

  The clock enumerators are defined in <dt-bindings/clock/qcom,rpmcc.h> and

  come in pairs:: FOO_CLK followed by FOO_A_CLK. The latter clock is

  an "active" clock, which means that the consumer only care that the clock is

  available when the apps CPU subsystem is active, i.e. not suspended or in

  deep idle. If it is important that the clock keeps running during system

  suspend, you need to specify the non-active clock, the one not containing

  *_A_* in the enumerator name.



properties:

  compatible:

    items:

      - enum:

          - qcom,rpmcc-apq8060

          - qcom,rpmcc-apq8064

          - qcom,rpmcc-ipq806x

          - qcom,rpmcc-mdm9607

          - qcom,rpmcc-msm8226

          - qcom,rpmcc-msm8660

          - qcom,rpmcc-msm8916

          - qcom,rpmcc-msm8936

          - qcom,rpmcc-msm8953

          - qcom,rpmcc-msm8974

          - qcom,rpmcc-msm8976

          - qcom,rpmcc-msm8992

          - qcom,rpmcc-msm8994

          - qcom,rpmcc-msm8996

          - qcom,rpmcc-msm8998

          - qcom,rpmcc-qcm2290

          - qcom,rpmcc-qcs404

          - qcom,rpmcc-sdm660

          - qcom,rpmcc-sm6115

          - qcom,rpmcc-sm6125

      - const: qcom,rpmcc



  '#clock-cells':

    const: 1



  clocks:

    maxItems: 1



  clock-names:

    const: xo



required:

  - compatible

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    rpm {

        rpm-requests {

            compatible = "qcom,rpm-msm8916";

            qcom,smd-channels = "rpm_requests";



            clock-controller {

                compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";

                #clock-cells = <1>;

            };

        };

    };