Commit 8562e78c authored by Neil Armstrong's avatar Neil Armstrong Committed by Chun-Kuang Hu
Browse files

dt-bindings: display: mediatek, hdmi: Convert to use graph schema 



Update the mediatek,dpi binding to use the graph schema.

Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 6efb943b

Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/mediatek/mediatek,cec.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Mediatek HDMI CEC Controller Device Tree Bindings



maintainers:

  - CK Hu <ck.hu@mediatek.com>

  - Jitao shi <jitao.shi@mediatek.com>



description: |

  The HDMI CEC controller handles hotplug detection and CEC communication.



properties:

  compatible:

    enum:

      - mediatek,mt7623-cec

      - mediatek,mt8173-cec



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



required:

  - compatible

  - reg

  - interrupts

  - clocks



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/mt8173-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    cec: cec@10013000 {

        compatible = "mediatek,mt8173-cec";

        reg = <0x10013000 0xbc>;

        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>;

        clocks = <&infracfg CLK_INFRA_CEC>;

    };



...

Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Mediatek HDMI DDC Device Tree Bindings



maintainers:

  - CK Hu <ck.hu@mediatek.com>

  - Jitao shi <jitao.shi@mediatek.com>



description: |

  The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.



properties:

  compatible:

    enum:

      - mediatek,mt7623-hdmi-ddc

      - mediatek,mt8173-hdmi-ddc



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  clock-names:

    items:

      - const: ddc-i2c



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/mt8173-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    hdmi_ddc0: i2c@11012000 {

        compatible = "mediatek,mt8173-hdmi-ddc";

        reg = <0x11012000 0x1c>;

        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;

        clocks = <&pericfg CLK_PERI_I2C5>;

        clock-names = "ddc-i2c";

    };



...

Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt

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Mediatek HDMI Encoder

=====================



The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from

its parallel input.



Required properties:

- compatible: Should be "mediatek,<chip>-hdmi".

- the supported chips are mt2701, mt7623 and mt8173

- reg: Physical base address and length of the controller's registers

- interrupts: The interrupt signal from the function block.

- clocks: device clocks

  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.

- clock-names: must contain "pixel", "pll", "bclk", and "spdif".

- phys: phandle link to the HDMI PHY node.

  See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.

- phy-names: must contain "hdmi"

- mediatek,syscon-hdmi: phandle link and register offset to the system

  configuration registers. For mt8173 this must be offset 0x900 into the

  MMSYS_CONFIG region: <&mmsys 0x900>.

- ports: A node containing input and output port nodes with endpoint

  definitions as documented in Documentation/devicetree/bindings/graph.txt.

- port@0: The input port in the ports node should be connected to a DPI output

  port.

- port@1: The output port in the ports node should be connected to the input

  port of a connector node that contains a ddc-i2c-bus property, or to the

  input port of an attached bridge chip, such as a SlimPort transmitter.



HDMI CEC

========



The HDMI CEC controller handles hotplug detection and CEC communication.



Required properties:

- compatible: Should be "mediatek,<chip>-cec"

- the supported chips are mt7623 and mt8173

- reg: Physical base address and length of the controller's registers

- interrupts: The interrupt signal from the function block.

- clocks: device clock



HDMI DDC

========



The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.

The Mediatek's I2C controller is used to interface with I2C devices.



Required properties:

- compatible: Should be "mediatek,<chip>-hdmi-ddc"

- the supported chips are mt7623 and mt8173

- reg: Physical base address and length of the controller's registers

- clocks: device clock

- clock-names: Should be "ddc-i2c".



HDMI PHY

========

See phy/mediatek,hdmi-phy.yaml



Example:



cec: cec@10013000 {

	compatible = "mediatek,mt8173-cec";

	reg = <0 0x10013000 0 0xbc>;

	interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>;

	clocks = <&infracfg CLK_INFRA_CEC>;

};



hdmi_phy: hdmi-phy@10209100 {

	compatible = "mediatek,mt8173-hdmi-phy";

	reg = <0 0x10209100 0 0x24>;

	clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;

	clock-names = "pll_ref";

	clock-output-names = "hdmitx_dig_cts";

	mediatek,ibias = <0xa>;

	mediatek,ibias_up = <0x1c>;

	#clock-cells = <0>;

	#phy-cells = <0>;

};



hdmi_ddc0: i2c@11012000 {

	compatible = "mediatek,mt8173-hdmi-ddc";

	reg = <0 0x11012000 0 0x1c>;

	interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;

	clocks = <&pericfg CLK_PERI_I2C5>;

	clock-names = "ddc-i2c";

};



hdmi0: hdmi@14025000 {

	compatible = "mediatek,mt8173-hdmi";

	reg = <0 0x14025000 0 0x400>;

	interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;

	clocks = <&mmsys CLK_MM_HDMI_PIXEL>,

		 <&mmsys CLK_MM_HDMI_PLLCK>,

		 <&mmsys CLK_MM_HDMI_AUDIO>,

		 <&mmsys CLK_MM_HDMI_SPDIF>;

	clock-names = "pixel", "pll", "bclk", "spdif";

	pinctrl-names = "default";

	pinctrl-0 = <&hdmi_pin>;

	phys = <&hdmi_phy>;

	phy-names = "hdmi";

	mediatek,syscon-hdmi = <&mmsys 0x900>;

	assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;

	assigned-clock-parents = <&hdmi_phy>;



	ports {

		#address-cells = <1>;

		#size-cells = <0>;



		port@0 {

			reg = <0>;



			hdmi0_in: endpoint {

				remote-endpoint = <&dpi0_out>;

			};

		};



		port@1 {

			reg = <1>;



			hdmi0_out: endpoint {

				remote-endpoint = <&hdmi_con_in>;

			};

		};

	};

};



connector {

	compatible = "hdmi-connector";

	type = "a";

	ddc-i2c-bus = <&hdmiddc0>;



	port {

		hdmi_con_in: endpoint {

			remote-endpoint = <&hdmi0_out>;

		};

	};

};

Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Mediatek HDMI Encoder Device Tree Bindings



maintainers:

  - CK Hu <ck.hu@mediatek.com>

  - Jitao shi <jitao.shi@mediatek.com>



description: |

  The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from

  its parallel input.



properties:

  compatible:

    enum:

      - mediatek,mt2701-hdmi

      - mediatek,mt7623-hdmi

      - mediatek,mt8173-hdmi



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: Pixel Clock

      - description: HDMI PLL

      - description: Bit Clock

      - description: S/PDIF Clock



  clock-names:

    items:

      - const: pixel

      - const: pll

      - const: bclk

      - const: spdif



  phys:

    maxItems: 1



  phy-names:

    items:

      - const: hdmi



  mediatek,syscon-hdmi:

    $ref: '/schemas/types.yaml#/definitions/phandle-array'

    maxItems: 1

    description: |

      phandle link and register offset to the system configuration registers.



  ports:

    $ref: /schemas/graph.yaml#/properties/ports



    properties:

      port@0:

        $ref: /schemas/graph.yaml#/properties/port

        description: |

          Input port node. This port should be connected to a DPI output port.



      port@1:

        $ref: /schemas/graph.yaml#/properties/port

        description: |

          Output port node. This port should be connected to the input port of a connector

          node that contains a ddc-i2c-bus property, or to the  input port of an attached

          bridge chip, such as a SlimPort transmitter.



    required:

      - port@0

      - port@1



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - phys

  - phy-names

  - mediatek,syscon-hdmi

  - ports



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/mt8173-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    hdmi0: hdmi@14025000 {

        compatible = "mediatek,mt8173-hdmi";

        reg = <0x14025000 0x400>;

        interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;

        clocks = <&mmsys CLK_MM_HDMI_PIXEL>,

             <&mmsys CLK_MM_HDMI_PLLCK>,

             <&mmsys CLK_MM_HDMI_AUDIO>,

             <&mmsys CLK_MM_HDMI_SPDIF>;

        clock-names = "pixel", "pll", "bclk", "spdif";

        pinctrl-names = "default";

        pinctrl-0 = <&hdmi_pin>;

        phys = <&hdmi_phy>;

        phy-names = "hdmi";

        mediatek,syscon-hdmi = <&mmsys 0x900>;



        ports {

          #address-cells = <1>;

          #size-cells = <0>;



          port@0 {

            reg = <0>;



            hdmi0_in: endpoint {

              remote-endpoint = <&dpi0_out>;

            };

          };



          port@1 {

            reg = <1>;



            hdmi0_out: endpoint {

              remote-endpoint = <&hdmi_con_in>;

            };

          };

        };

    };



...