Commit 84de5c2e authored by Gabe Teeger's avatar Gabe Teeger Committed by Alex Deucher
Browse files

drm/amd/display: Update optimized blank calc and programming 



[Why]
The existing calculations in DCN3.1 were placeholder and need to be
replaced with HW team approved calculations.

[How]
The new calculations add new parameters to the bounding box and pipe
params - VblankNom and the bounding box default.

The placeholder calculations are dropped from DCN3.1 in the meantime
while we work out hardware approved replacements.
Also fix a bug where we wipe out other register contents with a REG_SET
instead of a REG_UPDATE for the register we were programming the
min_dst_y_next_start_optimized.

Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarGabe Teeger <gabe.teeger@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7cc191ee

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubp.c

+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ static void hubp31_program_extended_blank(struct hubp *hubp, 
{

	struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);



	REG_SET(BLANK_OFFSET_1, 0, MIN_DST_Y_NEXT_START, min_dst_y_next_start_optimized);

	REG_UPDATE(BLANK_OFFSET_1, MIN_DST_Y_NEXT_START, min_dst_y_next_start_optimized);

}



static struct hubp_funcs dcn31_hubp_funcs = {

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

+0 −1
Original line number Diff line number Diff line
@@ -1651,7 +1651,6 @@ int dcn31_populate_dml_pipes_from_context( 
			continue;

		pipe = &res_ctx->pipe_ctx[i];

		timing = &pipe->stream->timing;



		if (pipe->plane_state &&

				(pipe->plane_state->src_rect.height < pipe->plane_state->dst_rect.height ||

				pipe->plane_state->src_rect.width < pipe->plane_state->dst_rect.width))

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

+2 −14
Original line number Diff line number Diff line
@@ -1055,7 +1055,6 @@ static void dml_rq_dlg_get_dlg_params( 


	float vba__refcyc_per_req_delivery_pre_l = get_refcyc_per_req_delivery_pre_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;  // From VBA

	float vba__refcyc_per_req_delivery_l = get_refcyc_per_req_delivery_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;  // From VBA

	int blank_lines;



	memset(disp_dlg_regs, 0, sizeof(*disp_dlg_regs));

	memset(disp_ttu_regs, 0, sizeof(*disp_ttu_regs));
@@ -1079,20 +1078,9 @@ static void dml_rq_dlg_get_dlg_params( 
	min_ttu_vblank = get_min_ttu_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);	// From VBA



	dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start;



	disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2));

	blank_lines = (dst->vblank_end + dst->vtotal_min - dst->vblank_start - dst->vstartup_start - 1);

	if (blank_lines < 0)

		blank_lines = 0;

	if (blank_lines != 0) {

		disp_dlg_regs->optimized_min_dst_y_next_start_us =

			((unsigned int) blank_lines * dst->hactive) / (unsigned int) dst->pixel_rate_mhz;

		disp_dlg_regs->optimized_min_dst_y_next_start =

			(unsigned int)(((double) (dlg_vblank_start + blank_lines)) * dml_pow(2, 2));

	} else {

		// use unoptimized value

	disp_dlg_regs->optimized_min_dst_y_next_start_us = 0;

	disp_dlg_regs->optimized_min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start;

	}

	ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18));



	dml_print("DML_DLG: %s: min_ttu_vblank (us)         = %3.2f\n", __func__, min_ttu_vblank);

drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h

+1 −0
Original line number Diff line number Diff line
@@ -329,6 +329,7 @@ struct _vcs_dpi_ip_params_st { 
	unsigned int number_of_cursors;

	unsigned int max_num_dp2p0_outputs;

	unsigned int max_num_dp2p0_streams;

	unsigned int VBlankNomDefaultUS;

};



struct _vcs_dpi_display_xfc_params_st {

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h

+1 −0
Original line number Diff line number Diff line
@@ -465,6 +465,7 @@ struct vba_vars_st { 
	unsigned int CursorBPP[DC__NUM_DPP__MAX][DC__NUM_CURSOR__MAX];

	bool XFCEnabled[DC__NUM_DPP__MAX];

	bool ScalerEnabled[DC__NUM_DPP__MAX];

	unsigned int VBlankNom[DC__NUM_DPP__MAX];



	// Intermediates/Informational

	bool ImmediateFlipSupport;