Commit 84a7f5a9 authored by Rob Herring's avatar Rob Herring Committed by Shawn Guo
Browse files

arm64: dts: imx8qm: Drop CPU 'arm,armv8' compatible 



The CPU 'arm,armv8' compatible is only for s/w models, so remove it from
i.MX8QM CPU nodes.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent afb424b9

arch/arm64/boot/dts/freescale/imx8qm.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ 


		A53_0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a53", "arm,armv8";

			compatible = "arm,cortex-a53";

			reg = <0x0 0x0>;

			enable-method = "psci";

			i-cache-size = <0x8000>;
@@ -68,7 +68,7 @@ 


		A53_1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a53", "arm,armv8";

			compatible = "arm,cortex-a53";

			reg = <0x0 0x1>;

			enable-method = "psci";

			i-cache-size = <0x8000>;
@@ -82,7 +82,7 @@ 


		A53_2: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a53", "arm,armv8";

			compatible = "arm,cortex-a53";

			reg = <0x0 0x2>;

			enable-method = "psci";

			i-cache-size = <0x8000>;
@@ -96,7 +96,7 @@ 


		A53_3: cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a53", "arm,armv8";

			compatible = "arm,cortex-a53";

			reg = <0x0 0x3>;

			enable-method = "psci";

			i-cache-size = <0x8000>;
@@ -110,7 +110,7 @@ 


		A72_0: cpu@100 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			compatible = "arm,cortex-a72";

			reg = <0x0 0x100>;

			enable-method = "psci";

			i-cache-size = <0xC000>;
@@ -124,7 +124,7 @@ 


		A72_1: cpu@101 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			compatible = "arm,cortex-a72";

			reg = <0x0 0x101>;

			enable-method = "psci";

			next-level-cache = <&A72_L2>;