Commit 8484925f authored by Yi Yang's avatar Yi Yang Committed by sanglipeng
Browse files

serial: tegra: handle clk prepare error in tegra_uart_hw_init() 

stable inclusion
from stable-v5.10.195
commit 0c6c0280f7405cffb0ef48bcbb6fbe461d6277ee
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I95JOC

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=0c6c0280f7405cffb0ef48bcbb6fbe461d6277ee



--------------------------------

[ Upstream commit 5abd0114 ]

In tegra_uart_hw_init(), the return value of clk_prepare_enable() should
be checked since it might fail.

Fixes: e9ea096d ("serial: tegra: add serial driver")
Signed-off-by: default avatarYi Yang <yiyang13@huawei.com>
Link: https://lore.kernel.org/r/20230817105406.228674-1-yiyang13@huawei.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarsanglipeng <sanglipeng1@jd.com>
parent bd76abaa

drivers/tty/serial/serial-tegra.c

+5 −1
Original line number Diff line number Diff line
@@ -994,7 +994,11 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) 
	tup->ier_shadow = 0;

	tup->current_baud = 0;



	clk_prepare_enable(tup->uart_clk);

	ret = clk_prepare_enable(tup->uart_clk);

	if (ret) {

		dev_err(tup->uport.dev, "could not enable clk\n");

		return ret;

	}



	/* Reset the UART controller to clear all previous status.*/

	reset_control_assert(tup->rst);