Commit 84176663 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv) 



Those APIs are used only by legacy ASICs(si/kv). They cannot be
shared by other ASICs. So, we create a new holder for them.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 28a31774

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

+1 −1
Original line number Diff line number Diff line
@@ -2532,7 +2532,7 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode) 
		break;

	}

	/* adjust pm to dpms */

	amdgpu_pm_compute_clocks(adev);

	amdgpu_dpm_compute_clocks(adev);

}



static void dce_v10_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

+1 −1
Original line number Diff line number Diff line
@@ -2608,7 +2608,7 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) 
		break;

	}

	/* adjust pm to dpms */

	amdgpu_pm_compute_clocks(adev);

	amdgpu_dpm_compute_clocks(adev);

}



static void dce_v11_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

+1 −1
Original line number Diff line number Diff line
@@ -2424,7 +2424,7 @@ static void dce_v6_0_crtc_dpms(struct drm_crtc *crtc, int mode) 
		break;

	}

	/* adjust pm to dpms */

	amdgpu_pm_compute_clocks(adev);

	amdgpu_dpm_compute_clocks(adev);

}



static void dce_v6_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

+1 −1
Original line number Diff line number Diff line
@@ -2433,7 +2433,7 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode) 
		break;

	}

	/* adjust pm to dpms */

	amdgpu_pm_compute_clocks(adev);

	amdgpu_dpm_compute_clocks(adev);

}



static void dce_v8_0_crtc_prepare(struct drm_crtc *crtc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

+1 −1
Original line number Diff line number Diff line
@@ -101,7 +101,7 @@ bool dm_pp_apply_display_requirements( 


		amdgpu_dpm_display_configuration_change(adev, &adev->pm.pm_display_cfg);



		amdgpu_pm_compute_clocks(adev);

		amdgpu_dpm_compute_clocks(adev);

	}



	return true;