Loading arch/m68k/include/asm/m54xxsim.h +9 −3 Original line number Diff line number Diff line Loading @@ -55,9 +55,15 @@ /* * Generic GPIO support */ #define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ #define MCFGPIO_IRQ_MAX -1 #define MCFGPIO_IRQ_VECBASE -1 #define MCFGPIO_PODR (MCF_MBAR + 0xA00) #define MCFGPIO_PDDR (MCF_MBAR + 0xA10) #define MCFGPIO_PPDR (MCF_MBAR + 0xA20) #define MCFGPIO_SETR (MCF_MBAR + 0xA20) #define MCFGPIO_CLRR (MCF_MBAR + 0xA30) #define MCFGPIO_PIN_MAX 136 /* 128 gpio + 8 eport */ #define MCFGPIO_IRQ_MAX 8 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE /* * EDGE Port support. Loading arch/m68k/include/asm/mcfgpio.h +8 −4 Original line number Diff line number Diff line Loading @@ -139,7 +139,8 @@ static inline void gpio_free(unsigned gpio) #if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) /* * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses * read-modify-write to change an output and a GPIO module which has separate Loading Loading @@ -195,7 +196,8 @@ static inline u32 __mcfgpio_ppdr(unsigned gpio) return MCFSIM2_GPIO1READ; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPPDR; Loading Loading @@ -237,7 +239,8 @@ static inline u32 __mcfgpio_podr(unsigned gpio) return MCFSIM2_GPIO1WRITE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDR; Loading Loading @@ -279,7 +282,8 @@ static inline u32 __mcfgpio_pddr(unsigned gpio) return MCFSIM2_GPIO1ENABLE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDDR; Loading Loading
arch/m68k/include/asm/m54xxsim.h +9 −3 Original line number Diff line number Diff line Loading @@ -55,9 +55,15 @@ /* * Generic GPIO support */ #define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ #define MCFGPIO_IRQ_MAX -1 #define MCFGPIO_IRQ_VECBASE -1 #define MCFGPIO_PODR (MCF_MBAR + 0xA00) #define MCFGPIO_PDDR (MCF_MBAR + 0xA10) #define MCFGPIO_PPDR (MCF_MBAR + 0xA20) #define MCFGPIO_SETR (MCF_MBAR + 0xA20) #define MCFGPIO_CLRR (MCF_MBAR + 0xA30) #define MCFGPIO_PIN_MAX 136 /* 128 gpio + 8 eport */ #define MCFGPIO_IRQ_MAX 8 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE /* * EDGE Port support. Loading
arch/m68k/include/asm/mcfgpio.h +8 −4 Original line number Diff line number Diff line Loading @@ -139,7 +139,8 @@ static inline void gpio_free(unsigned gpio) #if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) /* * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses * read-modify-write to change an output and a GPIO module which has separate Loading Loading @@ -195,7 +196,8 @@ static inline u32 __mcfgpio_ppdr(unsigned gpio) return MCFSIM2_GPIO1READ; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPPDR; Loading Loading @@ -237,7 +239,8 @@ static inline u32 __mcfgpio_podr(unsigned gpio) return MCFSIM2_GPIO1WRITE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDR; Loading Loading @@ -279,7 +282,8 @@ static inline u32 __mcfgpio_pddr(unsigned gpio) return MCFSIM2_GPIO1ENABLE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M53xx) || defined(CONFIG_M5441x) defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDDR; Loading