Commit 835a65f5 authored by Karol Herbst's avatar Karol Herbst
Browse files

drm/nouveau: bring back blit subchannel for pre nv50 GPUs 

1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128
was important as otherwise the GPU spams us with `CACHE_ERROR` messages.

We use the blit subchannel inside our vblank handling, so we should keep
at least this part.

v2: Only do it for NV11+ GPUs

Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/201


Fixes: 4a16dd9d ("drm/nouveau/kms: switch to drm fbdev helpers")
Signed-off-by: default avatarKarol Herbst <kherbst@redhat.com>
Reviewed-by: default avatarBen Skeggs <bskeggs@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230526091052.2169044-1-kherbst@redhat.com
parent 938a06c8

drivers/gpu/drm/nouveau/nouveau_chan.c

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ nouveau_channel_del(struct nouveau_channel **pchan) 
		if (cli)

			nouveau_svmm_part(chan->vmm->svmm, chan->inst);



		nvif_object_dtor(&chan->blit);

		nvif_object_dtor(&chan->nvsw);

		nvif_object_dtor(&chan->gart);

		nvif_object_dtor(&chan->vram);

drivers/gpu/drm/nouveau/nouveau_chan.h

+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ struct nouveau_channel { 
	u32 user_put;



	struct nvif_object user;

	struct nvif_object blit;



	struct nvif_event kill;

	atomic_t killed;

drivers/gpu/drm/nouveau/nouveau_drm.c

+17 −3
Original line number Diff line number Diff line
@@ -375,15 +375,29 @@ nouveau_accel_gr_init(struct nouveau_drm *drm) 
		ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",

				       NVDRM_NVSW, nouveau_abi16_swclass(drm),

				       NULL, 0, &drm->channel->nvsw);



		if (ret == 0 && device->info.chipset >= 0x11) {

			ret = nvif_object_ctor(&drm->channel->user, "drmBlit",

					       0x005f, 0x009f,

					       NULL, 0, &drm->channel->blit);

		}



		if (ret == 0) {

			struct nvif_push *push = drm->channel->chan.push;

			ret = PUSH_WAIT(push, 2);

			if (ret == 0)

			ret = PUSH_WAIT(push, 8);

			if (ret == 0) {

				if (device->info.chipset >= 0x11) {

					PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle);

					PUSH_NVSQ(push, NV09F, 0x0120, 0,

							       0x0124, 1,

							       0x0128, 2);

				}

				PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);

			}

		}



		if (ret) {

			NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);

			NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret);

			nouveau_accel_gr_fini(drm);

			return;

		}