Commit 82e7882b authored by Zeng Heng's avatar Zeng Heng Committed by Will Deacon
Browse files

kselftest/arm64: add lse and lse2 features to hwcap test 



Add the LSE and various features check in the set of hwcap tests.

As stated in the ARM manual, the LSE2 feature allows for atomic access
to unaligned memory. Therefore, for processors that only have the LSE
feature, we register .sigbus_fn to test their ability to perform
unaligned access.

Signed-off-by: default avatarZeng Heng <zengheng4@huawei.com>
Reviewed-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230808134036.668954-6-zengheng4@huawei.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent fd49cf08

tools/testing/selftests/arm64/abi/hwcap.c

+30 −0
Original line number Diff line number Diff line
@@ -34,6 +34,12 @@ 
 */

typedef void (*sig_fn)(void);



static void atomics_sigill(void)

{

	/* STADD W0, [SP] */

	asm volatile(".inst 0xb82003ff" : : : );

}



static void crc32_sigill(void)

{

	asm volatile("crc32w w0, w0, w1");
@@ -231,6 +237,14 @@ static void svebf16_sigill(void) 
	asm volatile(".inst 0x658aa000" : : : "z0");

}



static void uscat_sigbus(void)

{

	/* unaligned atomic access */

	asm volatile("ADD x1, sp, #2" : : : );

	/* STADD W0, [X1] */

	asm volatile(".inst 0xb820003f" : : : );

}



static const struct hwcap_data {

	const char *name;

	unsigned long at_hwcap;
@@ -276,6 +290,22 @@ static const struct hwcap_data { 
		.cpuinfo = "ilrcpc",

		.sigill_fn = ilrcpc_sigill,

	},

	{

		.name = "LSE",

		.at_hwcap = AT_HWCAP,

		.hwcap_bit = HWCAP_ATOMICS,

		.cpuinfo = "atomics",

		.sigill_fn = atomics_sigill,

	},

	{

		.name = "LSE2",

		.at_hwcap = AT_HWCAP,

		.hwcap_bit = HWCAP_USCAT,

		.cpuinfo = "uscat",

		.sigill_fn = atomics_sigill,

		.sigbus_fn = uscat_sigbus,

		.sigbus_reliable = true,

	},

	{

		.name = "MOPS",

		.at_hwcap = AT_HWCAP2,