Commit 82a7ebf0 authored by Michal Simek's avatar Michal Simek
Browse files

arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106



Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/82b2b13006307f108ace81c50c213c3857078b57.1611224800.git.michal.simek@xilinx.com
parent 5f816e36
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+17 −0
Original line number Diff line number Diff line
@@ -132,6 +132,12 @@
		compatible = "iio-hwmon";
		io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
	};

	refhdmi: refhdmi {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <114285000>;
	};
};

&can1 {
@@ -526,6 +532,17 @@
				 * interrupt-parent = <&>;
				 * interrupts = <>;
				 */
				#address-cells = <1>;
				#size-cells = <0>;
				#clock-cells = <1>;
				clocks = <&refhdmi>;
				clock-names = "xtal";
				clock-output-names = "si5328";

				si5328_clk: clk0@0 {
					reg = <0>;
					clock-frequency = <27000000>;
				};
			};
		};
		/* 5 - 7 unconnected */
+22 −0
Original line number Diff line number Diff line
@@ -132,6 +132,12 @@
		compatible = "iio-hwmon";
		io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
	};

	refhdmi: refhdmi {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <114285000>;
	};
};

&can1 {
@@ -520,6 +526,22 @@
			reg = <4>;
			si5328: clock-generator@69 {/* SI5328 - u20 */
				reg = <0x69>;
				/*
				 * Chip has interrupt present connected to PL
				 * interrupt-parent = <&>;
				 * interrupts = <>;
				 */
				#address-cells = <1>;
				#size-cells = <0>;
				#clock-cells = <1>;
				clocks = <&refhdmi>;
				clock-names = "xtal";
				clock-output-names = "si5328";

				si5328_clk: clk0@0 {
					reg = <0>;
					clock-frequency = <27000000>;
				};
			};
		};
		i2c@5 {