Loading arch/arm/boot/dts/at91sam9n12.dtsi +28 −296 Original line number Diff line number Diff line Loading @@ -104,7 +104,7 @@ ramc0: ramc@ffffe800 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe800 0x200>; clocks = <&ddrck>; clocks = <&pmc PMC_TYPE_SYSTEM 2>; clock-names = "ddrck"; }; Loading @@ -116,278 +116,10 @@ pmc: pmc@fffffc00 { compatible = "atmel,at91sam9n12-pmc", "syscon"; reg = <0xfffffc00 0x200>; #clock-cells = <2>; clocks = <&clk32k>, <&main_xtal>; clock-names = "slow_clk", "main_xtal"; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; interrupt-controller; #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; main_rc_osc: main_rc_osc { compatible = "atmel,at91sam9x5-clk-main-rc-osc"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; clock-frequency = <12000000>; clock-accuracy = <50000000>; }; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; clocks = <&main_xtal>; }; main: mainck { compatible = "atmel,at91sam9x5-clk-main"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; clocks = <&main_rc_osc>, <&main_osc>; }; plla: pllack { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_LOCKA>; clocks = <&main>; reg = <0>; atmel,clk-input-range = <2000000 32000000>; #atmel,pll-clk-output-range-cells = <4>; atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, <695000000 750000000 1 0>, <645000000 700000000 2 0>, <595000000 650000000 3 0>, <545000000 600000000 0 1>, <495000000 555000000 1 1>, <445000000 500000000 2 1>, <400000000 450000000 3 1>; }; plladiv: plladivck { compatible = "atmel,at91sam9x5-clk-plldiv"; #clock-cells = <0>; clocks = <&plla>; }; pllb: pllbck { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_LOCKB>; clocks = <&main>; reg = <1>; atmel,clk-input-range = <2000000 32000000>; #atmel,pll-clk-output-range-cells = <3>; atmel,pll-clk-output-ranges = <30000000 100000000 0>; }; mck: masterck { compatible = "atmel,at91sam9x5-clk-master"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>; atmel,clk-output-range = <0 133333333>; atmel,clk-divisors = <1 2 4 3>; atmel,master-clk-have-div3-pres; }; usb: usbck { compatible = "atmel,at91sam9n12-clk-usb"; #clock-cells = <0>; clocks = <&pllb>; }; prog: progck { compatible = "atmel,at91sam9x5-clk-programmable"; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&pmc>; clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>; prog0: prog0 { #clock-cells = <0>; reg = <0>; interrupts = <AT91_PMC_PCKRDY(0)>; }; prog1: prog1 { #clock-cells = <0>; reg = <1>; interrupts = <AT91_PMC_PCKRDY(1)>; }; }; systemck { compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; #size-cells = <0>; ddrck: ddrck { #clock-cells = <0>; reg = <2>; clocks = <&mck>; }; lcdck: lcdck { #clock-cells = <0>; reg = <3>; clocks = <&mck>; }; uhpck: uhpck { #clock-cells = <0>; reg = <6>; clocks = <&usb>; }; udpck: udpck { #clock-cells = <0>; reg = <7>; clocks = <&usb>; }; pck0: pck0 { #clock-cells = <0>; reg = <8>; clocks = <&prog0>; }; pck1: pck1 { #clock-cells = <0>; reg = <9>; clocks = <&prog1>; }; }; periphck { compatible = "atmel,at91sam9x5-clk-peripheral"; #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; pioAB_clk: pioAB_clk { #clock-cells = <0>; reg = <2>; }; pioCD_clk: pioCD_clk { #clock-cells = <0>; reg = <3>; }; fuse_clk: fuse_clk { #clock-cells = <0>; reg = <4>; }; usart0_clk: usart0_clk { #clock-cells = <0>; reg = <5>; }; usart1_clk: usart1_clk { #clock-cells = <0>; reg = <6>; }; usart2_clk: usart2_clk { #clock-cells = <0>; reg = <7>; }; usart3_clk: usart3_clk { #clock-cells = <0>; reg = <8>; }; twi0_clk: twi0_clk { reg = <9>; #clock-cells = <0>; }; twi1_clk: twi1_clk { #clock-cells = <0>; reg = <10>; }; mci0_clk: mci0_clk { #clock-cells = <0>; reg = <12>; }; spi0_clk: spi0_clk { #clock-cells = <0>; reg = <13>; }; spi1_clk: spi1_clk { #clock-cells = <0>; reg = <14>; }; uart0_clk: uart0_clk { #clock-cells = <0>; reg = <15>; }; uart1_clk: uart1_clk { #clock-cells = <0>; reg = <16>; }; tcb_clk: tcb_clk { #clock-cells = <0>; reg = <17>; }; pwm_clk: pwm_clk { #clock-cells = <0>; reg = <18>; }; adc_clk: adc_clk { #clock-cells = <0>; reg = <19>; }; dma0_clk: dma0_clk { #clock-cells = <0>; reg = <20>; }; uhphs_clk: uhphs_clk { #clock-cells = <0>; reg = <22>; }; udphs_clk: udphs_clk { #clock-cells = <0>; reg = <23>; }; lcdc_clk: lcdc_clk { #clock-cells = <0>; reg = <25>; }; sha_clk: sha_clk { #clock-cells = <0>; reg = <27>; }; ssc0_clk: ssc0_clk { #clock-cells = <0>; reg = <28>; }; aes_clk: aes_clk { #clock-cells = <0>; reg = <29>; }; trng_clk: trng_clk { #clock-cells = <0>; reg = <30>; }; }; }; rstc@fffffe00 { Loading @@ -400,7 +132,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&mck>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; shdwc@fffffe10 { Loading Loading @@ -439,7 +171,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; clocks = <&mci0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; Loading @@ -452,7 +184,7 @@ #size-cells = <0>; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb_clk>, <&clk32k>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; Loading @@ -462,7 +194,7 @@ #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb_clk>, <&clk32k>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; Loading @@ -470,7 +202,7 @@ compatible = "atmel,at91sam9n12-hlcdc"; reg = <0xf8038000 0x2000>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; clock-names = "periph_clk", "sys_clk", "slow_clk"; status = "disabled"; Loading Loading @@ -499,7 +231,7 @@ reg = <0xffffec00 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&dma0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; clock-names = "dma_clk"; }; Loading Loading @@ -817,7 +549,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioAB_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio@fffff600 { Loading @@ -828,7 +560,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioAB_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioC: gpio@fffff800 { Loading @@ -839,7 +571,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCD_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioD: gpio@fffffa00 { Loading @@ -850,7 +582,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCD_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; }; Loading @@ -860,7 +592,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; clocks = <&mck>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; }; Loading @@ -874,7 +606,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; clocks = <&ssc0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; clock-names = "pclk"; status = "disabled"; }; Loading @@ -885,7 +617,7 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; clocks = <&usart0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; clock-names = "usart"; status = "disabled"; }; Loading @@ -896,7 +628,7 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; clocks = <&usart1_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; }; Loading @@ -907,7 +639,7 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; clocks = <&usart2_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; }; Loading @@ -918,7 +650,7 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; clocks = <&usart3_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; }; Loading @@ -934,7 +666,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&twi0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; status = "disabled"; }; Loading @@ -949,7 +681,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&twi1_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; status = "disabled"; }; Loading @@ -964,7 +696,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; clocks = <&spi0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; }; Loading @@ -980,7 +712,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; clocks = <&spi1_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "spi_clk"; status = "disabled"; }; Loading Loading @@ -1009,7 +741,7 @@ reg = <0xf8034000 0x300>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; clocks = <&pwm_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; status = "disabled"; }; Loading @@ -1017,7 +749,7 @@ compatible = "atmel,at91sam9260-udc"; reg = <0xf803c000 0x4000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&udphs_clk>, <&udpck>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>; clock-names = "pclk", "hclk"; status = "disabled"; }; Loading @@ -1027,7 +759,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; Loading @@ -1045,7 +777,7 @@ 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; clocks = <&mck>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller { Loading arch/arm/boot/dts/at91sam9n12ek.dts +1 −1 Original line number Diff line number Diff line Loading @@ -59,7 +59,7 @@ wm8904: codec@1a { compatible = "wlf,wm8904"; reg = <0x1a>; clocks = <&pck0>; clocks = <&pmc PMC_TYPE_SYSTEM 8>; clock-names = "mclk"; }; Loading Loading
arch/arm/boot/dts/at91sam9n12.dtsi +28 −296 Original line number Diff line number Diff line Loading @@ -104,7 +104,7 @@ ramc0: ramc@ffffe800 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe800 0x200>; clocks = <&ddrck>; clocks = <&pmc PMC_TYPE_SYSTEM 2>; clock-names = "ddrck"; }; Loading @@ -116,278 +116,10 @@ pmc: pmc@fffffc00 { compatible = "atmel,at91sam9n12-pmc", "syscon"; reg = <0xfffffc00 0x200>; #clock-cells = <2>; clocks = <&clk32k>, <&main_xtal>; clock-names = "slow_clk", "main_xtal"; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; interrupt-controller; #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; main_rc_osc: main_rc_osc { compatible = "atmel,at91sam9x5-clk-main-rc-osc"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; clock-frequency = <12000000>; clock-accuracy = <50000000>; }; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; clocks = <&main_xtal>; }; main: mainck { compatible = "atmel,at91sam9x5-clk-main"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; clocks = <&main_rc_osc>, <&main_osc>; }; plla: pllack { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_LOCKA>; clocks = <&main>; reg = <0>; atmel,clk-input-range = <2000000 32000000>; #atmel,pll-clk-output-range-cells = <4>; atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, <695000000 750000000 1 0>, <645000000 700000000 2 0>, <595000000 650000000 3 0>, <545000000 600000000 0 1>, <495000000 555000000 1 1>, <445000000 500000000 2 1>, <400000000 450000000 3 1>; }; plladiv: plladivck { compatible = "atmel,at91sam9x5-clk-plldiv"; #clock-cells = <0>; clocks = <&plla>; }; pllb: pllbck { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_LOCKB>; clocks = <&main>; reg = <1>; atmel,clk-input-range = <2000000 32000000>; #atmel,pll-clk-output-range-cells = <3>; atmel,pll-clk-output-ranges = <30000000 100000000 0>; }; mck: masterck { compatible = "atmel,at91sam9x5-clk-master"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>; atmel,clk-output-range = <0 133333333>; atmel,clk-divisors = <1 2 4 3>; atmel,master-clk-have-div3-pres; }; usb: usbck { compatible = "atmel,at91sam9n12-clk-usb"; #clock-cells = <0>; clocks = <&pllb>; }; prog: progck { compatible = "atmel,at91sam9x5-clk-programmable"; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&pmc>; clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>; prog0: prog0 { #clock-cells = <0>; reg = <0>; interrupts = <AT91_PMC_PCKRDY(0)>; }; prog1: prog1 { #clock-cells = <0>; reg = <1>; interrupts = <AT91_PMC_PCKRDY(1)>; }; }; systemck { compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; #size-cells = <0>; ddrck: ddrck { #clock-cells = <0>; reg = <2>; clocks = <&mck>; }; lcdck: lcdck { #clock-cells = <0>; reg = <3>; clocks = <&mck>; }; uhpck: uhpck { #clock-cells = <0>; reg = <6>; clocks = <&usb>; }; udpck: udpck { #clock-cells = <0>; reg = <7>; clocks = <&usb>; }; pck0: pck0 { #clock-cells = <0>; reg = <8>; clocks = <&prog0>; }; pck1: pck1 { #clock-cells = <0>; reg = <9>; clocks = <&prog1>; }; }; periphck { compatible = "atmel,at91sam9x5-clk-peripheral"; #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; pioAB_clk: pioAB_clk { #clock-cells = <0>; reg = <2>; }; pioCD_clk: pioCD_clk { #clock-cells = <0>; reg = <3>; }; fuse_clk: fuse_clk { #clock-cells = <0>; reg = <4>; }; usart0_clk: usart0_clk { #clock-cells = <0>; reg = <5>; }; usart1_clk: usart1_clk { #clock-cells = <0>; reg = <6>; }; usart2_clk: usart2_clk { #clock-cells = <0>; reg = <7>; }; usart3_clk: usart3_clk { #clock-cells = <0>; reg = <8>; }; twi0_clk: twi0_clk { reg = <9>; #clock-cells = <0>; }; twi1_clk: twi1_clk { #clock-cells = <0>; reg = <10>; }; mci0_clk: mci0_clk { #clock-cells = <0>; reg = <12>; }; spi0_clk: spi0_clk { #clock-cells = <0>; reg = <13>; }; spi1_clk: spi1_clk { #clock-cells = <0>; reg = <14>; }; uart0_clk: uart0_clk { #clock-cells = <0>; reg = <15>; }; uart1_clk: uart1_clk { #clock-cells = <0>; reg = <16>; }; tcb_clk: tcb_clk { #clock-cells = <0>; reg = <17>; }; pwm_clk: pwm_clk { #clock-cells = <0>; reg = <18>; }; adc_clk: adc_clk { #clock-cells = <0>; reg = <19>; }; dma0_clk: dma0_clk { #clock-cells = <0>; reg = <20>; }; uhphs_clk: uhphs_clk { #clock-cells = <0>; reg = <22>; }; udphs_clk: udphs_clk { #clock-cells = <0>; reg = <23>; }; lcdc_clk: lcdc_clk { #clock-cells = <0>; reg = <25>; }; sha_clk: sha_clk { #clock-cells = <0>; reg = <27>; }; ssc0_clk: ssc0_clk { #clock-cells = <0>; reg = <28>; }; aes_clk: aes_clk { #clock-cells = <0>; reg = <29>; }; trng_clk: trng_clk { #clock-cells = <0>; reg = <30>; }; }; }; rstc@fffffe00 { Loading @@ -400,7 +132,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&mck>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; shdwc@fffffe10 { Loading Loading @@ -439,7 +171,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; clocks = <&mci0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; Loading @@ -452,7 +184,7 @@ #size-cells = <0>; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb_clk>, <&clk32k>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; Loading @@ -462,7 +194,7 @@ #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb_clk>, <&clk32k>; clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; Loading @@ -470,7 +202,7 @@ compatible = "atmel,at91sam9n12-hlcdc"; reg = <0xf8038000 0x2000>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; clock-names = "periph_clk", "sys_clk", "slow_clk"; status = "disabled"; Loading Loading @@ -499,7 +231,7 @@ reg = <0xffffec00 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&dma0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; clock-names = "dma_clk"; }; Loading Loading @@ -817,7 +549,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioAB_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio@fffff600 { Loading @@ -828,7 +560,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioAB_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioC: gpio@fffff800 { Loading @@ -839,7 +571,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCD_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioD: gpio@fffffa00 { Loading @@ -850,7 +582,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCD_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; }; Loading @@ -860,7 +592,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; clocks = <&mck>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; }; Loading @@ -874,7 +606,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; clocks = <&ssc0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; clock-names = "pclk"; status = "disabled"; }; Loading @@ -885,7 +617,7 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; clocks = <&usart0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; clock-names = "usart"; status = "disabled"; }; Loading @@ -896,7 +628,7 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; clocks = <&usart1_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; }; Loading @@ -907,7 +639,7 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; clocks = <&usart2_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; }; Loading @@ -918,7 +650,7 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; clocks = <&usart3_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; }; Loading @@ -934,7 +666,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&twi0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; status = "disabled"; }; Loading @@ -949,7 +681,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&twi1_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; status = "disabled"; }; Loading @@ -964,7 +696,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; clocks = <&spi0_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; }; Loading @@ -980,7 +712,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; clocks = <&spi1_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "spi_clk"; status = "disabled"; }; Loading Loading @@ -1009,7 +741,7 @@ reg = <0xf8034000 0x300>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; clocks = <&pwm_clk>; clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; status = "disabled"; }; Loading @@ -1017,7 +749,7 @@ compatible = "atmel,at91sam9260-udc"; reg = <0xf803c000 0x4000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&udphs_clk>, <&udpck>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>; clock-names = "pclk", "hclk"; status = "disabled"; }; Loading @@ -1027,7 +759,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; Loading @@ -1045,7 +777,7 @@ 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; clocks = <&mck>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller { Loading
arch/arm/boot/dts/at91sam9n12ek.dts +1 −1 Original line number Diff line number Diff line Loading @@ -59,7 +59,7 @@ wm8904: codec@1a { compatible = "wlf,wm8904"; reg = <0x1a>; clocks = <&pck0>; clocks = <&pmc PMC_TYPE_SYSTEM 8>; clock-names = "mclk"; }; Loading