Commit 828db598 authored by Darren Powell's avatar Darren Powell Committed by Alex Deucher
Browse files

amdgpu/pm: Replace navi10 usage of sprintf with sysfs_emit 



 initial modification of files
  smu_cmn.c
  navi10_ppt.c

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_sclk_od
pp_mclk_od
pp_dpm_pcie
pp_od_clk_voltage
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: default avatarDarren Powell <darren.powell@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 59066d00

drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

+32 −29
Original line number Diff line number Diff line
@@ -1303,7 +1303,7 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
				if (ret)

					return size;



				size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,

				size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, value,

						cur_value == value ? "*" : "");

			}

		} else {
@@ -1321,7 +1321,7 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
				freq_values[1] = (freq_values[0] + freq_values[2]) / 2;



			for (i = 0; i < 3; i++) {

				size += sprintf(buf + size, "%d: %uMhz %s\n", i, freq_values[i],

				size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, freq_values[i],

						i == mark_index ? "*" : "");

			}
@@ -1331,7 +1331,7 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
		gen_speed = smu_v11_0_get_current_pcie_link_speed_level(smu);

		lane_width = smu_v11_0_get_current_pcie_link_width_level(smu);

		for (i = 0; i < NUM_LINK_LEVELS; i++)

			size += sprintf(buf + size, "%d: %s %s %dMhz %s\n", i,

			size += sysfs_emit_at(buf, size, "%d: %s %s %dMhz %s\n", i,

					(dpm_context->dpm_tables.pcie_table.pcie_gen[i] == 0) ? "2.5GT/s," :

					(dpm_context->dpm_tables.pcie_table.pcie_gen[i] == 1) ? "5.0GT/s," :

					(dpm_context->dpm_tables.pcie_table.pcie_gen[i] == 2) ? "8.0GT/s," :
@@ -1352,23 +1352,24 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
			break;

		if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_GFXCLK_LIMITS))

			break;

		size += sprintf(buf + size, "OD_SCLK:\n");

		size += sprintf(buf + size, "0: %uMhz\n1: %uMhz\n", od_table->GfxclkFmin, od_table->GfxclkFmax);

		size += sysfs_emit_at(buf, size, "OD_SCLK:\n");

		size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n",

				      od_table->GfxclkFmin, od_table->GfxclkFmax);

		break;

	case SMU_OD_MCLK:

		if (!smu->od_enabled || !od_table || !od_settings)

			break;

		if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_UCLK_MAX))

			break;

		size += sprintf(buf + size, "OD_MCLK:\n");

		size += sprintf(buf + size, "1: %uMHz\n", od_table->UclkFmax);

		size += sysfs_emit_at(buf, size, "OD_MCLK:\n");

		size += sysfs_emit_at(buf, size, "1: %uMHz\n", od_table->UclkFmax);

		break;

	case SMU_OD_VDDC_CURVE:

		if (!smu->od_enabled || !od_table || !od_settings)

			break;

		if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_GFXCLK_CURVE))

			break;

		size += sprintf(buf + size, "OD_VDDC_CURVE:\n");

		size += sysfs_emit_at(buf, size, "OD_VDDC_CURVE:\n");

		for (i = 0; i < 3; i++) {

			switch (i) {

			case 0:
@@ -1383,54 +1384,56 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
			default:

				break;

			}

			size += sprintf(buf + size, "%d: %uMHz %umV\n", i, curve_settings[0], curve_settings[1] / NAVI10_VOLTAGE_SCALE);

			size += sysfs_emit_at(buf, size, "%d: %uMHz %umV\n",

					      i, curve_settings[0],

					curve_settings[1] / NAVI10_VOLTAGE_SCALE);

		}

		break;

	case SMU_OD_RANGE:

		if (!smu->od_enabled || !od_table || !od_settings)

			break;

		size = sprintf(buf, "%s:\n", "OD_RANGE");

		size = sysfs_emit(buf, "%s:\n", "OD_RANGE");



		if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_GFXCLK_LIMITS)) {

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_GFXCLKFMIN,

						    &min_value, NULL);

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_GFXCLKFMAX,

						    NULL, &max_value);

			size += sprintf(buf + size, "SCLK: %7uMhz %10uMhz\n",

			size += sysfs_emit_at(buf, size, "SCLK: %7uMhz %10uMhz\n",

					min_value, max_value);

		}



		if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_UCLK_MAX)) {

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_UCLKFMAX,

						    &min_value, &max_value);

			size += sprintf(buf + size, "MCLK: %7uMhz %10uMhz\n",

			size += sysfs_emit_at(buf, size, "MCLK: %7uMhz %10uMhz\n",

					min_value, max_value);

		}



		if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_GFXCLK_CURVE)) {

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1,

						    &min_value, &max_value);

			size += sprintf(buf + size, "VDDC_CURVE_SCLK[0]: %7uMhz %10uMhz\n",

			size += sysfs_emit_at(buf, size, "VDDC_CURVE_SCLK[0]: %7uMhz %10uMhz\n",

					      min_value, max_value);

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1,

						    &min_value, &max_value);

			size += sprintf(buf + size, "VDDC_CURVE_VOLT[0]: %7dmV %11dmV\n",

			size += sysfs_emit_at(buf, size, "VDDC_CURVE_VOLT[0]: %7dmV %11dmV\n",

					      min_value, max_value);

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2,

						    &min_value, &max_value);

			size += sprintf(buf + size, "VDDC_CURVE_SCLK[1]: %7uMhz %10uMhz\n",

			size += sysfs_emit_at(buf, size, "VDDC_CURVE_SCLK[1]: %7uMhz %10uMhz\n",

					      min_value, max_value);

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2,

						    &min_value, &max_value);

			size += sprintf(buf + size, "VDDC_CURVE_VOLT[1]: %7dmV %11dmV\n",

			size += sysfs_emit_at(buf, size, "VDDC_CURVE_VOLT[1]: %7dmV %11dmV\n",

					      min_value, max_value);

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3,

						    &min_value, &max_value);

			size += sprintf(buf + size, "VDDC_CURVE_SCLK[2]: %7uMhz %10uMhz\n",

			size += sysfs_emit_at(buf, size, "VDDC_CURVE_SCLK[2]: %7uMhz %10uMhz\n",

					      min_value, max_value);

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3,

						    &min_value, &max_value);

			size += sprintf(buf + size, "VDDC_CURVE_VOLT[2]: %7dmV %11dmV\n",

			size += sysfs_emit_at(buf, size, "VDDC_CURVE_VOLT[2]: %7dmV %11dmV\n",

					      min_value, max_value);

		}
@@ -1730,7 +1733,7 @@ static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf) 
	if (!buf)

		return -EINVAL;



	size += sprintf(buf + size, "%16s %s %s %s %s %s %s %s %s %s %s\n",

	size += sysfs_emit_at(buf, size, "%16s %s %s %s %s %s %s %s %s %s %s\n",

			title[0], title[1], title[2], title[3], title[4], title[5],

			title[6], title[7], title[8], title[9], title[10]);
@@ -1750,10 +1753,10 @@ static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf) 
			return result;

		}



		size += sprintf(buf + size, "%2d %14s%s:\n",

		size += sysfs_emit_at(buf, size, "%2d %14s%s:\n",

			i, profile_name[i], (i == smu->power_profile_mode) ? "*" : " ");



		size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",

		size += sysfs_emit_at(buf, size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",

			" ",

			0,

			"GFXCLK",
@@ -1767,7 +1770,7 @@ static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf) 
			activity_monitor.Gfx_PD_Data_error_coeff,

			activity_monitor.Gfx_PD_Data_error_rate_coeff);



		size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",

		size += sysfs_emit_at(buf, size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",

			" ",

			1,

			"SOCCLK",
@@ -1781,7 +1784,7 @@ static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf) 
			activity_monitor.Soc_PD_Data_error_coeff,

			activity_monitor.Soc_PD_Data_error_rate_coeff);



		size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",

		size += sysfs_emit_at(buf, size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",

			" ",

			2,

			"MEMLK",

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

+3 −3
Original line number Diff line number Diff line
@@ -710,7 +710,7 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu, 
			return 0;

	}



	size =  sprintf(buf + size, "features high: 0x%08x low: 0x%08x\n",

	size =  sysfs_emit_at(buf, size, "features high: 0x%08x low: 0x%08x\n",

			feature_mask[1], feature_mask[0]);



	memset(sort_feature, -1, sizeof(sort_feature));
@@ -725,14 +725,14 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu, 
		sort_feature[feature_index] = i;

	}



	size += sprintf(buf + size, "%-2s. %-20s  %-3s : %-s\n",

	size += sysfs_emit_at(buf, size, "%-2s. %-20s  %-3s : %-s\n",

			"No", "Feature", "Bit", "State");



	for (i = 0; i < SMU_FEATURE_COUNT; i++) {

		if (sort_feature[i] < 0)

			continue;



		size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n",

		size += sysfs_emit_at(buf, size, "%02d. %-20s (%2d) : %s\n",

				count++,

				smu_get_feature_name(smu, sort_feature[i]),

				i,