Commit 822ff993 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm: remove duplicated code from a6xx_create_address_space 



The function a6xx_create_address_space() is mostly a copy of
adreno_iommu_create_address_space() with added quirk setting. Rework
these two functions to be a thin wrappers around a common helper.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarRob Clark <robdclark@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/509614/
Link: https://lore.kernel.org/r/20221102175449.452283-3-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 3236130b

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -500,7 +500,7 @@ static const struct adreno_gpu_funcs funcs = { 
#endif

		.gpu_state_get = a3xx_gpu_state_get,

		.gpu_state_put = adreno_gpu_state_put,

		.create_address_space = adreno_iommu_create_address_space,

		.create_address_space = adreno_create_address_space,

		.get_rptr = a3xx_get_rptr,

	},

};

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -635,7 +635,7 @@ static const struct adreno_gpu_funcs funcs = { 
#endif

		.gpu_state_get = a4xx_gpu_state_get,

		.gpu_state_put = adreno_gpu_state_put,

		.create_address_space = adreno_iommu_create_address_space,

		.create_address_space = adreno_create_address_space,

		.get_rptr = a4xx_get_rptr,

	},

	.get_timestamp = a4xx_get_timestamp,

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -1705,7 +1705,7 @@ static const struct adreno_gpu_funcs funcs = { 
		.gpu_busy = a5xx_gpu_busy,

		.gpu_state_get = a5xx_gpu_state_get,

		.gpu_state_put = a5xx_gpu_state_put,

		.create_address_space = adreno_iommu_create_address_space,

		.create_address_space = adreno_create_address_space,

		.get_rptr = a5xx_get_rptr,

	},

	.get_timestamp = a5xx_get_timestamp,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+1 −27
Original line number Diff line number Diff line
@@ -1786,10 +1786,6 @@ a6xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) 
{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

	struct iommu_domain_geometry *geometry;

	struct msm_mmu *mmu;

	struct msm_gem_address_space *aspace;

	u64 start, size;

	unsigned long quirks = 0;



	/*
@@ -1799,29 +1795,7 @@ a6xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) 
	if (!IS_ERR_OR_NULL(a6xx_gpu->htw_llc_slice))

		quirks |= IO_PGTABLE_QUIRK_ARM_OUTER_WBWA;



	mmu = msm_iommu_new(&pdev->dev, quirks);

	if (IS_ERR_OR_NULL(mmu))

		return ERR_CAST(mmu);



	geometry = msm_iommu_get_geometry(mmu);

	if (IS_ERR(geometry))

		return ERR_CAST(geometry);



	/*

	 * Use the aperture start or SZ_16M, whichever is greater. This will

	 * ensure that we align with the allocated pagetable range while still

	 * allowing room in the lower 32 bits for GMEM and whatnot

	 */

	start = max_t(u64, SZ_16M, geometry->aperture_start);

	size = geometry->aperture_end - start + 1;



	aspace = msm_gem_address_space_create(mmu, "gpu",

		start & GENMASK_ULL(48, 0), size);



	if (IS_ERR(aspace) && !IS_ERR(mmu))

		mmu->funcs->destroy(mmu);



	return aspace;

	return adreno_iommu_create_address_space(gpu, pdev, quirks);

}



static struct msm_gem_address_space *

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+10 −2
Original line number Diff line number Diff line
@@ -192,15 +192,23 @@ int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) 
}



struct msm_gem_address_space *

adreno_iommu_create_address_space(struct msm_gpu *gpu,

adreno_create_address_space(struct msm_gpu *gpu,

			    struct platform_device *pdev)

{

	return adreno_iommu_create_address_space(gpu, pdev, 0);

}



struct msm_gem_address_space *

adreno_iommu_create_address_space(struct msm_gpu *gpu,

				  struct platform_device *pdev,

				  unsigned long quirks)

{

	struct iommu_domain_geometry *geometry;

	struct msm_mmu *mmu;

	struct msm_gem_address_space *aspace;

	u64 start, size;



	mmu = msm_iommu_new(&pdev->dev, 0);

	mmu = msm_iommu_new(&pdev->dev, quirks);

	if (IS_ERR_OR_NULL(mmu))

		return ERR_CAST(mmu);