Commit 820f722c authored by Philipp Zabel's avatar Philipp Zabel
Browse files

dt-bindings: reset: snps,axs10x-reset: Convert to yaml 



Convert the device tree bindings for the AXS10x reset controller to YAML
schema to allow participating in DT validation.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220407154338.4190674-8-p.zabel@pengutronix.de
parent 5c9360ea

Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt

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Binding for the AXS10x reset controller



This binding describes the ARC AXS10x boards custom IP-block which allows

to control reset signals of selected peripherals. For example DW GMAC, etc...

This block is controlled via memory-mapped register (AKA CREG) which

represents up-to 32 reset lines.



As of today only the following lines are used:

 - DW GMAC - line 5



This binding uses the common reset binding[1].



[1] Documentation/devicetree/bindings/reset/reset.txt



Required properties:

- compatible: should be "snps,axs10x-reset".

- reg: should always contain pair address - length: for creg reset

  bits register.

- #reset-cells: from common reset binding; Should always be set to 1.



Example:

	reset: reset-controller@11220 {

		compatible = "snps,axs10x-reset";

		#reset-cells = <1>;

		reg = <0x11220 0x4>;

	};



Specifying reset lines connected to IP modules:

	ethernet@.... {

		....

		resets = <&reset 5>;

		....

	};

Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: AXS10x reset controller



maintainers:

  - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>



description: |

  This binding describes the ARC AXS10x boards custom IP-block which allows

  to control reset signals of selected peripherals. For example DW GMAC, etc...

  This block is controlled via memory-mapped register (AKA CREG) which

  represents up-to 32 reset lines.

  As of today only the following lines are used:

   - DW GMAC - line 5



properties:

  compatible:

    const: snps,axs10x-reset



  reg:

    maxItems: 1



  '#reset-cells':

    const: 1



required:

  - compatible

  - reg

  - '#reset-cells'



additionalProperties: false



examples:

  - |

    reset: reset-controller@11220 {

        compatible = "snps,axs10x-reset";

        #reset-cells = <1>;

        reg = <0x11220 0x4>;

    };



    // Specifying reset lines connected to IP modules:

    ethernet {

        resets = <&reset 5>;

    };