Commit 8208461d authored by Aharon Landau's avatar Aharon Landau Committed by Leon Romanovsky
Browse files

net/mlx5: Add ifc bits to support optional counters 



Adding bth_opcode field and the relevant bits. This field will be used
to capture and count congestion notification packets (CNP).

Adding source_vhca_port support bit.
This field will be used to check the capability to use the
source_vhca_port as a match criteria in cases of dual port.

Signed-off-by: default avatarAharon Landau <aharonl@nvidia.com>
Reviewed-by: default avatarMaor Gottlieb <maorg@nvidia.com>
Signed-off-by: default avatarMark Zhang <markzhang@nvidia.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@nvidia.com>
parent d2c8a155

include/linux/mlx5/mlx5_ifc.h

+19 −3
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ struct mlx5_ifc_flow_table_fields_supported_bits { 
	u8         outer_geneve_oam[0x1];

	u8         outer_geneve_protocol_type[0x1];

	u8         outer_geneve_opt_len[0x1];

	u8         reserved_at_1e[0x1];

	u8         source_vhca_port[0x1];

	u8         source_eswitch_port[0x1];



	u8         inner_dmac[0x1];
@@ -393,6 +393,14 @@ struct mlx5_ifc_flow_table_fields_supported_bits { 
	u8         metadata_reg_c_0[0x1];

};



struct mlx5_ifc_flow_table_fields_supported_2_bits {

	u8         reserved_at_0[0xe];

	u8         bth_opcode[0x1];

	u8         reserved_at_f[0x11];



	u8         reserved_at_20[0x60];

};



struct mlx5_ifc_flow_table_prop_layout_bits {

	u8         ft_support[0x1];

	u8         reserved_at_1[0x1];
@@ -539,7 +547,7 @@ struct mlx5_ifc_fte_match_set_misc_bits { 
	union mlx5_ifc_gre_key_bits gre_key;



	u8         vxlan_vni[0x18];

	u8         reserved_at_b8[0x8];

	u8         bth_opcode[0x8];



	u8         geneve_vni[0x18];

	u8         reserved_at_d8[0x7];
@@ -756,7 +764,15 @@ struct mlx5_ifc_flow_table_nic_cap_bits { 


	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;



	u8         reserved_at_e00[0x1200];

	u8         reserved_at_e00[0x700];



	struct mlx5_ifc_flow_table_fields_supported_2_bits ft_field_support_2_nic_receive_rdma;



	u8         reserved_at_1580[0x280];



	struct mlx5_ifc_flow_table_fields_supported_2_bits ft_field_support_2_nic_transmit_rdma;



	u8         reserved_at_1880[0x780];



	u8         sw_steering_nic_rx_action_drop_icm_address[0x40];