Commit 81db370c authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: stop touching sched.ready in the backend 



This unfortunately comes up in regular intervals and breaks
GPU reset for the engine in question.

The sched.ready flag controls if an engine can't get working
during hw_init, but should never be set to false during hw_fini.

v2: squash in unused variable fix (Alex)

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6e8bcdd6

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

+0 −2
Original line number Diff line number Diff line
@@ -198,8 +198,6 @@ static int jpeg_v2_5_hw_fini(void *handle) 
		if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&

		      RREG32_SOC15(JPEG, i, mmUVD_JRBC_STATUS))

			jpeg_v2_5_set_powergating_state(adev, AMD_PG_STATE_GATE);



		ring->sched.ready = false;

	}



	return 0;

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

+0 −2
Original line number Diff line number Diff line
@@ -166,8 +166,6 @@ static int jpeg_v3_0_hw_fini(void *handle) 
	      RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS))

		jpeg_v3_0_set_powergating_state(adev, AMD_PG_STATE_GATE);



	ring->sched.ready = false;



	return 0;

}

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

+0 −5
Original line number Diff line number Diff line
@@ -502,11 +502,6 @@ static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev) 
		ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0);

		WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

	}



	sdma0->sched.ready = false;

	sdma1->sched.ready = false;

	sdma2->sched.ready = false;

	sdma3->sched.ready = false;

}



/**

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

+1 −7
Original line number Diff line number Diff line
@@ -381,7 +381,7 @@ static int vcn_v3_0_hw_fini(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	struct amdgpu_ring *ring;

	int i, j;

	int i;



	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

		if (adev->vcn.harvest_config & (1 << i))
@@ -396,12 +396,6 @@ static int vcn_v3_0_hw_fini(void *handle) 
				vcn_v3_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

			}

		}

		ring->sched.ready = false;



		for (j = 0; j < adev->vcn.num_enc_rings; ++j) {

			ring = &adev->vcn.inst[i].ring_enc[j];

			ring->sched.ready = false;

		}

	}



	return 0;