Loading sound/soc/codecs/tlv320adc3xxx.c +3 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #include <dt-bindings/sound/tlv320adc3xxx.h> #include <linux/clk.h> #include <linux/gpio/consumer.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/io.h> Loading Loading @@ -1025,7 +1026,9 @@ static const struct gpio_chip adc3xxx_gpio_chip = { static void adc3xxx_free_gpio(struct adc3xxx *adc3xxx) { #ifdef CONFIG_GPIOLIB gpiochip_remove(&adc3xxx->gpio_chip); #endif } static void adc3xxx_init_gpio(struct adc3xxx *adc3xxx) Loading sound/soc/fsl/fsl_micfil.c +19 −0 Original line number Diff line number Diff line Loading @@ -194,6 +194,25 @@ static int fsl_micfil_reset(struct device *dev) if (ret) return ret; /* * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined * as non-volatile register, so SRES still remain in regmap * cache after set, that every update of REG_MICFIL_CTRL1, * software reset happens. so clear it explicitly. */ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, MICFIL_CTRL1_SRES); if (ret) return ret; /* * Set SRES should clear CHnF flags, But even add delay here * the CHnF may not be cleared sometimes, so clear CHnF explicitly. */ ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); if (ret) return ret; return 0; } Loading sound/soc/soc-ops.c +7 −1 Original line number Diff line number Diff line Loading @@ -452,7 +452,7 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, val = ucontrol->value.integer.value[0]; if (mc->platform_max && val > mc->platform_max) return -EINVAL; if (val > max - min) if (val > max) return -EINVAL; val_mask = mask << shift; val = (val + min) & mask; Loading @@ -468,6 +468,12 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, val_mask = mask << rshift; val2 = (ucontrol->value.integer.value[1] + min) & mask; if (mc->platform_max && val2 > mc->platform_max) return -EINVAL; if (val2 > max) return -EINVAL; val2 = val2 << rshift; err = snd_soc_component_update_bits(component, reg2, val_mask, Loading Loading
sound/soc/codecs/tlv320adc3xxx.c +3 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ #include <dt-bindings/sound/tlv320adc3xxx.h> #include <linux/clk.h> #include <linux/gpio/consumer.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/io.h> Loading Loading @@ -1025,7 +1026,9 @@ static const struct gpio_chip adc3xxx_gpio_chip = { static void adc3xxx_free_gpio(struct adc3xxx *adc3xxx) { #ifdef CONFIG_GPIOLIB gpiochip_remove(&adc3xxx->gpio_chip); #endif } static void adc3xxx_init_gpio(struct adc3xxx *adc3xxx) Loading
sound/soc/fsl/fsl_micfil.c +19 −0 Original line number Diff line number Diff line Loading @@ -194,6 +194,25 @@ static int fsl_micfil_reset(struct device *dev) if (ret) return ret; /* * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined * as non-volatile register, so SRES still remain in regmap * cache after set, that every update of REG_MICFIL_CTRL1, * software reset happens. so clear it explicitly. */ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, MICFIL_CTRL1_SRES); if (ret) return ret; /* * Set SRES should clear CHnF flags, But even add delay here * the CHnF may not be cleared sometimes, so clear CHnF explicitly. */ ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); if (ret) return ret; return 0; } Loading
sound/soc/soc-ops.c +7 −1 Original line number Diff line number Diff line Loading @@ -452,7 +452,7 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, val = ucontrol->value.integer.value[0]; if (mc->platform_max && val > mc->platform_max) return -EINVAL; if (val > max - min) if (val > max) return -EINVAL; val_mask = mask << shift; val = (val + min) & mask; Loading @@ -468,6 +468,12 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, val_mask = mask << rshift; val2 = (ucontrol->value.integer.value[1] + min) & mask; if (mc->platform_max && val2 > mc->platform_max) return -EINVAL; if (val2 > max) return -EINVAL; val2 = val2 << rshift; err = snd_soc_component_update_bits(component, reg2, val_mask, Loading