Commit 81b04a80 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Revert "net: stmmac: correct MAC propagation delay"

This reverts commit 20bf98c9.

Richard raised concerns about correctness of the code on previous
generations of the HW.

Fixes: 20bf98c9 ("net: stmmac: correct MAC propagation delay")
Link: https://lore.kernel.org/all/ZMGIuKVP7BEotbrn@hoboy.vegasvil.org/
Link: https://lore.kernel.org/r/20230726224054.3241127-1-kuba@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 85e2a2c4
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+0 −3
Original line number Diff line number Diff line
@@ -532,7 +532,6 @@ struct stmmac_hwtimestamp {
	void (*get_systime) (void __iomem *ioaddr, u64 *systime);
	void (*get_ptptime)(void __iomem *ioaddr, u64 *ptp_time);
	void (*timestamp_interrupt)(struct stmmac_priv *priv);
	void (*correct_latency)(struct stmmac_priv *priv);
};

#define stmmac_config_hw_tstamping(__priv, __args...) \
@@ -551,8 +550,6 @@ struct stmmac_hwtimestamp {
	stmmac_do_void_callback(__priv, ptp, get_ptptime, __args)
#define stmmac_timestamp_interrupt(__priv, __args...) \
	stmmac_do_void_callback(__priv, ptp, timestamp_interrupt, __args)
#define stmmac_correct_latency(__priv, __args...) \
	stmmac_do_void_callback(__priv, ptp, correct_latency, __args)

struct stmmac_tx_queue;
struct stmmac_rx_queue;
+0 −43
Original line number Diff line number Diff line
@@ -60,48 +60,6 @@ static void config_sub_second_increment(void __iomem *ioaddr,
		*ssinc = data;
}

static void correct_latency(struct stmmac_priv *priv)
{
	void __iomem *ioaddr = priv->ptpaddr;
	u32 reg_tsic, reg_tsicsns;
	u32 reg_tsec, reg_tsecsns;
	u64 scaled_ns;
	u32 val;

	/* MAC-internal ingress latency */
	scaled_ns = readl(ioaddr + PTP_TS_INGR_LAT);

	/* See section 11.7.2.5.3.1 "Ingress Correction" on page 4001 of
	 * i.MX8MP Applications Processor Reference Manual Rev. 1, 06/2021
	 */
	val = readl(ioaddr + PTP_TCR);
	if (val & PTP_TCR_TSCTRLSSR)
		/* nanoseconds field is in decimal format with granularity of 1ns/bit */
		scaled_ns = ((u64)NSEC_PER_SEC << 16) - scaled_ns;
	else
		/* nanoseconds field is in binary format with granularity of ~0.466ns/bit */
		scaled_ns = ((1ULL << 31) << 16) -
			DIV_U64_ROUND_CLOSEST(scaled_ns * PSEC_PER_NSEC, 466U);

	reg_tsic = scaled_ns >> 16;
	reg_tsicsns = scaled_ns & 0xff00;

	/* set bit 31 for 2's compliment */
	reg_tsic |= BIT(31);

	writel(reg_tsic, ioaddr + PTP_TS_INGR_CORR_NS);
	writel(reg_tsicsns, ioaddr + PTP_TS_INGR_CORR_SNS);

	/* MAC-internal egress latency */
	scaled_ns = readl(ioaddr + PTP_TS_EGR_LAT);

	reg_tsec = scaled_ns >> 16;
	reg_tsecsns = scaled_ns & 0xff00;

	writel(reg_tsec, ioaddr + PTP_TS_EGR_CORR_NS);
	writel(reg_tsecsns, ioaddr + PTP_TS_EGR_CORR_SNS);
}

static int init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
{
	u32 value;
@@ -263,5 +221,4 @@ const struct stmmac_hwtimestamp stmmac_ptp = {
	.get_systime = get_systime,
	.get_ptptime = get_ptptime,
	.timestamp_interrupt = timestamp_interrupt,
	.correct_latency = correct_latency,
};
+0 −4
Original line number Diff line number Diff line
@@ -909,8 +909,6 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)
	priv->hwts_tx_en = 0;
	priv->hwts_rx_en = 0;

	stmmac_correct_latency(priv, priv);

	return 0;
}

@@ -1096,8 +1094,6 @@ static void stmmac_mac_link_up(struct phylink_config *config,

	if (priv->dma_cap.fpesel)
		stmmac_fpe_link_state_handle(priv, true);

	stmmac_correct_latency(priv, priv);
}

static const struct phylink_mac_ops stmmac_phylink_mac_ops = {
+0 −6
Original line number Diff line number Diff line
@@ -26,12 +26,6 @@
#define	PTP_ACR		0x40	/* Auxiliary Control Reg */
#define	PTP_ATNR	0x48	/* Auxiliary Timestamp - Nanoseconds Reg */
#define	PTP_ATSR	0x4c	/* Auxiliary Timestamp - Seconds Reg */
#define	PTP_TS_INGR_CORR_NS	0x58	/* Ingress timestamp correction nanoseconds */
#define	PTP_TS_EGR_CORR_NS	0x5C	/* Egress timestamp correction nanoseconds*/
#define	PTP_TS_INGR_CORR_SNS	0x60	/* Ingress timestamp correction subnanoseconds */
#define	PTP_TS_EGR_CORR_SNS	0x64	/* Egress timestamp correction subnanoseconds */
#define	PTP_TS_INGR_LAT	0x68	/* MAC internal Ingress Latency */
#define	PTP_TS_EGR_LAT	0x6c	/* MAC internal Egress Latency */

#define	PTP_STNSUR_ADDSUB_SHIFT	31
#define	PTP_DIGITAL_ROLLOVER_MODE	0x3B9ACA00	/* 10e9-1 ns */