Commit 818c8321 authored by Rex-BC Chen's avatar Rex-BC Chen Committed by Viresh Kumar
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dt-bindings: cpufreq: mediatek: Add MediaTek CCI property 



MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module
for scaling clock frequency and adjust voltage.
The phandle could be linked between CPU and MediaTek CCI for some
MediaTek SoCs, like MT8183 and MT8186.

The reason we need the link status between cpufreq and MediaTek cci is
cpufreq and mediatek cci could share the same regulator in some MediaTek
SoCs. Therefore, to prevent the issue of high frequency and low voltage,
we need to use this to make sure mediatek cci is ready.

Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent 85f5b3c4

Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt

+7 −0
Original line number Diff line number Diff line
@@ -20,6 +20,13 @@ Optional properties: 
	       Vsram to fit SoC specific needs. When absent, the voltage scaling

	       flow is handled by hardware, hence no software "voltage tracking" is

	       needed.

- mediatek,cci:

	Used to confirm the link status between cpufreq and mediatek cci. Because

	cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.

	To prevent the issue of high frequency and low voltage, we need to use this

	property to make sure mediatek cci is ready.

	For details of mediatek cci, please refer to

	Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml

- #cooling-cells:

	For details, please refer to

	Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml