Commit 81772e44 authored by Alex Elder's avatar Alex Elder Committed by David S. Miller
Browse files

net: ipa: start generalizing "ipa_reg" 



IPA register definitions have evolved with each new version.  The
changes required to support more than 32 endpoints in IPA v5.0 made
it best to define a unified mechanism for defining registers and
their fields.

GSI register definitions, meanwhile, have remained fairly stable.
And even as the total number of IPA endpoints goes beyond 32, the
number of GSI channels on a given EE that underly endpoints still
remains 32 or less.

Despite that, GSI v3.0 (which is used with IPA v5.0) extends the
number of channels (and events) it supports to be about 256, and as
a result, many GSI register definitions must change significantly.
To address this, we'll use the same "ipa_reg" mechanism to define
the GSI registers.

As a first step in generalizing the "ipa_reg" to also support GSI
registers, isolate the definitions of the "ipa_reg" and "ipa_regs"
structure types (and some supporting macros) into a new header file,
and remove the "ipa_" and "IPA_" from symbol names.

Separate the IPA register ID validity checking from the generic
check that a register ID is in range.  Aside from that, this is
intended to have no functional effect on the code.

Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0ec573ef

drivers/net/ipa/ipa.h

+1 −1
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@ struct ipa { 
	bool uc_loaded;



	void __iomem *reg_virt;

	const struct ipa_regs *regs;

	const struct regs *regs;



	dma_addr_t mem_addr;

	void *mem_virt;

drivers/net/ipa/ipa_cmd.c

+1 −1
Original line number Diff line number Diff line
@@ -287,7 +287,7 @@ static bool ipa_cmd_register_write_offset_valid(struct ipa *ipa, 
/* Check whether offsets passed to register_write are valid */

static bool ipa_cmd_register_write_valid(struct ipa *ipa)

{

	const struct ipa_reg *reg;

	const struct reg *reg;

	const char *name;

	u32 offset;

drivers/net/ipa/ipa_endpoint.c

+24 −24
Original line number Diff line number Diff line
@@ -241,7 +241,7 @@ static bool ipa_endpoint_data_valid_one(struct ipa *ipa, u32 count, 


	if (!data->toward_ipa) {

		const struct ipa_endpoint_rx *rx_config;

		const struct ipa_reg *reg;

		const struct reg *reg;

		u32 buffer_size;

		u32 aggr_size;

		u32 limit;
@@ -447,7 +447,7 @@ static bool 
ipa_endpoint_init_ctrl(struct ipa_endpoint *endpoint, bool suspend_delay)

{

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 field_id;

	u32 offset;

	bool state;
@@ -493,7 +493,7 @@ static bool ipa_endpoint_aggr_active(struct ipa_endpoint *endpoint) 
	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	u32 unit = endpoint_id / 32;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	WARN_ON(!test_bit(endpoint_id, ipa->available));
@@ -510,7 +510,7 @@ static void ipa_endpoint_force_close(struct ipa_endpoint *endpoint) 
	u32 mask = BIT(endpoint_id % 32);

	struct ipa *ipa = endpoint->ipa;

	u32 unit = endpoint_id / 32;

	const struct ipa_reg *reg;

	const struct reg *reg;



	WARN_ON(!test_bit(endpoint_id, ipa->available));
@@ -613,7 +613,7 @@ int ipa_endpoint_modem_exception_reset_all(struct ipa *ipa) 


	for_each_set_bit(endpoint_id, ipa->defined, ipa->endpoint_count) {

		struct ipa_endpoint *endpoint;

		const struct ipa_reg *reg;

		const struct reg *reg;

		u32 offset;



		/* We only reset modem TX endpoints */
@@ -645,7 +645,7 @@ static void ipa_endpoint_init_cfg(struct ipa_endpoint *endpoint) 
	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	enum ipa_cs_offload_en enabled;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;



	reg = ipa_reg(ipa, ENDP_INIT_CFG);
@@ -681,7 +681,7 @@ static void ipa_endpoint_init_nat(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	if (!endpoint->toward_ipa)
@@ -716,7 +716,7 @@ ipa_qmap_header_size(enum ipa_version version, struct ipa_endpoint *endpoint) 


/* Encoded value for ENDP_INIT_HDR register HDR_LEN* field(s) */

static u32 ipa_header_size_encode(enum ipa_version version,

				  const struct ipa_reg *reg, u32 header_size)

				  const struct reg *reg, u32 header_size)

{

	u32 field_max = ipa_reg_field_max(reg, HDR_LEN);

	u32 val;
@@ -738,7 +738,7 @@ static u32 ipa_header_size_encode(enum ipa_version version, 


/* Encoded value for ENDP_INIT_HDR register OFST_METADATA* field(s) */

static u32 ipa_metadata_offset_encode(enum ipa_version version,

				      const struct ipa_reg *reg, u32 offset)

				      const struct reg *reg, u32 offset)

{

	u32 field_max = ipa_reg_field_max(reg, HDR_OFST_METADATA);

	u32 val;
@@ -783,7 +783,7 @@ static void ipa_endpoint_init_hdr(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;



	reg = ipa_reg(ipa, ENDP_INIT_HDR);
@@ -828,7 +828,7 @@ static void ipa_endpoint_init_hdr_ext(struct ipa_endpoint *endpoint) 
	u32 pad_align = endpoint->config.rx.pad_align;

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;



	reg = ipa_reg(ipa, ENDP_INIT_HDR_EXT);
@@ -879,7 +879,7 @@ static void ipa_endpoint_init_hdr_metadata_mask(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;

	u32 offset;
@@ -899,7 +899,7 @@ static void ipa_endpoint_init_hdr_metadata_mask(struct ipa_endpoint *endpoint) 
static void ipa_endpoint_init_mode(struct ipa_endpoint *endpoint)

{

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 offset;

	u32 val;
@@ -963,7 +963,7 @@ ipa_qtime_val(struct ipa *ipa, u32 microseconds, u32 max, u32 *select) 
}



/* Encode the aggregation timer limit (microseconds) based on IPA version */

static u32 aggr_time_limit_encode(struct ipa *ipa, const struct ipa_reg *reg,

static u32 aggr_time_limit_encode(struct ipa *ipa, const struct reg *reg,

				  u32 microseconds)

{

	u32 ticks;
@@ -994,7 +994,7 @@ static void ipa_endpoint_init_aggr(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;



	reg = ipa_reg(ipa, ENDP_INIT_AGGR);
@@ -1043,7 +1043,7 @@ static void ipa_endpoint_init_aggr(struct ipa_endpoint *endpoint) 
 * Return the encoded value representing the timeout period provided

 * that should be written to the ENDP_INIT_HOL_BLOCK_TIMER register.

 */

static u32 hol_block_timer_encode(struct ipa *ipa, const struct ipa_reg *reg,

static u32 hol_block_timer_encode(struct ipa *ipa, const struct reg *reg,

				  u32 microseconds)

{

	u32 width;
@@ -1109,7 +1109,7 @@ static void ipa_endpoint_init_hol_block_timer(struct ipa_endpoint *endpoint, 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	/* This should only be changed when HOL_BLOCK_EN is disabled */
@@ -1124,7 +1124,7 @@ ipa_endpoint_init_hol_block_en(struct ipa_endpoint *endpoint, bool enable) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 offset;

	u32 val;
@@ -1171,7 +1171,7 @@ static void ipa_endpoint_init_deaggr(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;



	if (!endpoint->toward_ipa)
@@ -1191,7 +1191,7 @@ static void ipa_endpoint_init_rsrc_grp(struct ipa_endpoint *endpoint) 
	u32 resource_group = endpoint->config.resource_group;

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	reg = ipa_reg(ipa, ENDP_INIT_RSRC_GRP);
@@ -1204,7 +1204,7 @@ static void ipa_endpoint_init_seq(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	if (!endpoint->toward_ipa)
@@ -1270,7 +1270,7 @@ static void ipa_endpoint_status(struct ipa_endpoint *endpoint) 
{

	u32 endpoint_id = endpoint->endpoint_id;

	struct ipa *ipa = endpoint->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val = 0;



	reg = ipa_reg(ipa, ENDP_STATUS);
@@ -1636,7 +1636,7 @@ void ipa_endpoint_trans_release(struct ipa_endpoint *endpoint, 


void ipa_endpoint_default_route_set(struct ipa *ipa, u32 endpoint_id)

{

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	reg = ipa_reg(ipa, ROUTE);
@@ -1985,7 +1985,7 @@ void ipa_endpoint_deconfig(struct ipa *ipa) 
int ipa_endpoint_config(struct ipa *ipa)

{

	struct device *dev = &ipa->pdev->dev;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 endpoint_id;

	u32 hw_limit;

	u32 tx_count;

drivers/net/ipa/ipa_interrupt.c

+6 −6
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ struct ipa_interrupt { 
static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)

{

	struct ipa *ipa = interrupt->ipa;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 mask = BIT(irq_id);

	u32 offset;
@@ -85,7 +85,7 @@ static irqreturn_t ipa_isr_thread(int irq, void *dev_id) 
	struct ipa_interrupt *interrupt = dev_id;

	struct ipa *ipa = interrupt->ipa;

	u32 enabled = interrupt->enabled;

	const struct ipa_reg *reg;

	const struct reg *reg;

	struct device *dev;

	u32 pending;

	u32 offset;
@@ -132,7 +132,7 @@ static irqreturn_t ipa_isr_thread(int irq, void *dev_id) 


static void ipa_interrupt_enabled_update(struct ipa *ipa)

{

	const struct ipa_reg *reg = ipa_reg(ipa, IPA_IRQ_EN);

	const struct reg *reg = ipa_reg(ipa, IPA_IRQ_EN);



	iowrite32(ipa->interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg));

}
@@ -170,7 +170,7 @@ static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt, 
	struct ipa *ipa = interrupt->ipa;

	u32 mask = BIT(endpoint_id % 32);

	u32 unit = endpoint_id / 32;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 offset;

	u32 val;
@@ -215,7 +215,7 @@ void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) 


	unit_count = roundup(ipa->endpoint_count, 32);

	for (unit = 0; unit < unit_count; unit++) {

		const struct ipa_reg *reg;

		const struct reg *reg;

		u32 val;



		reg = ipa_reg(ipa, IRQ_SUSPEND_INFO);
@@ -241,7 +241,7 @@ struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa) 
{

	struct device *dev = &ipa->pdev->dev;

	struct ipa_interrupt *interrupt;

	const struct ipa_reg *reg;

	const struct reg *reg;

	unsigned int irq;

	int ret;

drivers/net/ipa/ipa_main.c

+9 −9
Original line number Diff line number Diff line
@@ -203,7 +203,7 @@ static void ipa_teardown(struct ipa *ipa) 
static void

ipa_hardware_config_bcr(struct ipa *ipa, const struct ipa_data *data)

{

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	/* IPA v4.5+ has no backward compatibility register */
@@ -218,7 +218,7 @@ ipa_hardware_config_bcr(struct ipa *ipa, const struct ipa_data *data) 
static void ipa_hardware_config_tx(struct ipa *ipa)

{

	enum ipa_version version = ipa->version;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 offset;

	u32 val;
@@ -239,7 +239,7 @@ static void ipa_hardware_config_tx(struct ipa *ipa) 
static void ipa_hardware_config_clkon(struct ipa *ipa)

{

	enum ipa_version version = ipa->version;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	if (version >= IPA_VERSION_4_5)
@@ -265,7 +265,7 @@ static void ipa_hardware_config_clkon(struct ipa *ipa) 
/* Configure bus access behavior for IPA components */

static void ipa_hardware_config_comp(struct ipa *ipa)

{

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 offset;

	u32 val;
@@ -299,7 +299,7 @@ ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data) 
{

	const struct ipa_qsb_data *data0;

	const struct ipa_qsb_data *data1;

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	/* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */
@@ -368,7 +368,7 @@ static __always_inline u32 ipa_aggr_granularity_val(u32 usec) 
 */

static void ipa_qtime_config(struct ipa *ipa)

{

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 offset;

	u32 val;
@@ -416,7 +416,7 @@ static void ipa_qtime_config(struct ipa *ipa) 
static void ipa_hardware_config_counter(struct ipa *ipa)

{

	u32 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY);

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	reg = ipa_reg(ipa, COUNTER_CFG);
@@ -435,7 +435,7 @@ static void ipa_hardware_config_timing(struct ipa *ipa) 


static void ipa_hardware_config_hashing(struct ipa *ipa)

{

	const struct ipa_reg *reg;

	const struct reg *reg;



	/* Other than IPA v4.2, all versions enable "hashing".  Starting

	 * with IPA v5.0, the filter and router tables are implemented
@@ -458,7 +458,7 @@ static void ipa_idle_indication_cfg(struct ipa *ipa, 
				    u32 enter_idle_debounce_thresh,

				    bool const_non_idle_enable)

{

	const struct ipa_reg *reg;

	const struct reg *reg;

	u32 val;



	if (ipa->version < IPA_VERSION_3_5_1)