Commit 815f4ef2 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts 



No reason to stuff both DDI and TC port handling into the same
function. Split it into two.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200630215601.28557-9-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent 1db9f992

drivers/gpu/drm/i915/i915_irq.c

+27 −21
Original line number Diff line number Diff line
@@ -3089,22 +3089,25 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv) 
	ibx_hpd_detection_setup(dev_priv);

}



static void icp_hpd_detection_setup(struct drm_i915_private *dev_priv,

				    u32 ddi_hotplug_enable_mask,

				    u32 tc_hotplug_enable_mask)

static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv,

					u32 enable_mask)

{

	u32 hotplug;



	hotplug = I915_READ(SHOTPLUG_CTL_DDI);

	hotplug |= ddi_hotplug_enable_mask;

	hotplug |= enable_mask;

	I915_WRITE(SHOTPLUG_CTL_DDI, hotplug);

}



static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,

				       u32 enable_mask)

{

	u32 hotplug;



	if (tc_hotplug_enable_mask) {

	hotplug = I915_READ(SHOTPLUG_CTL_TC);

		hotplug |= tc_hotplug_enable_mask;

	hotplug |= enable_mask;

	I915_WRITE(SHOTPLUG_CTL_TC, hotplug);

}

}



static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,

			      u32 sde_ddi_mask, u32 sde_tc_mask,
@@ -3120,7 +3123,9 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv, 


	ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);



	icp_hpd_detection_setup(dev_priv, ddi_enable_mask, tc_enable_mask);

	icp_ddi_hpd_detection_setup(dev_priv, ddi_enable_mask);

	if (tc_enable_mask)

		icp_tc_hpd_detection_setup(dev_priv, tc_enable_mask);

}



/*
@@ -3538,17 +3543,18 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv) 
	gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);

	I915_WRITE(SDEIMR, ~mask);



	if (HAS_PCH_TGP(dev_priv))

		icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK,

					TGP_TC_HPD_ENABLE_MASK);

	else if (HAS_PCH_JSP(dev_priv))

		icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0);

	else if (HAS_PCH_MCC(dev_priv))

		icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,

					ICP_TC_HPD_ENABLE(PORT_TC1));

	else

		icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,

					ICP_TC_HPD_ENABLE_MASK);

	if (HAS_PCH_TGP(dev_priv)) {

		icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);

		icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK);

	} else if (HAS_PCH_JSP(dev_priv)) {

		icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);

	} else if (HAS_PCH_MCC(dev_priv)) {

		icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);

		icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE(PORT_TC1));

	} else {

		icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);

		icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE_MASK);

	}

}



static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)