Commit 81306dbc authored by Bibo Mao's avatar Bibo Mao Committed by Xianglai Li
Browse files

irqchip/loongson-eiointc: Skip handling if there is no pending irq 

mainline inclusion
from mainline-v6.9-rc1
commit 3eece72ded7f67776731709702f3d1b9893b6a4f
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I9BTOX


CVE: NA

--------------------------------

It is one simple optimization in the interrupt dispatch function
eiointc_irq_dispatch(). There are 256 IRQs supported for eiointc on
Loongson-3A5000 and Loongson-2K2000 platform, 128 IRQs on Loongson-2K0500
platform, eiointc irq handler reads the bitmap and find pending irqs
when irq happens. So there are several consecutive iocsr_read64
operations for the all bits to find all pending irqs. If the pending
bitmap is zero, it means that there is no pending irq for the this
irq bitmap range, we can skip handling to avoid some useless operations
such as clearing hw ISR.

Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Acked-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent e86cbfc1

drivers/irqchip/irq-loongson-eiointc.c

+6 −0
Original line number Diff line number Diff line
@@ -212,6 +212,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc) 


	for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) {

		pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3));



		/* Skip handling if pending bitmap is zero */

		if (!pending)

			continue;



		/* Clear the IRQs */

		iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3));

		while (pending) {

			int bit = __ffs(pending);