Commit 80fb7a40 authored by Martin Leung's avatar Martin Leung Committed by Alex Deucher
Browse files

drm/amd/display: cleaning up smu_if to add future flexibility 



This commit cleans up code that uses old variables and adds some SMU
interfaces for future flexibility.

Signed-off-by: default avatarMartin Leung <Martin.Leung@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 214d72f6

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

+9 −10
Original line number Diff line number Diff line
@@ -27,6 +27,8 @@ 


#include "clk_mgr_internal.h"

#include "reg_helper.h"

#include "dalsmc.h"

#include "smu13_driver_if.h"



#define mmDAL_MSG_REG  0x1628A

#define mmDAL_ARG_REG  0x16273
@@ -38,8 +40,6 @@ 
	mm ## reg_name



#include "logger_types.h"

#include "dalsmc.h"

#include "smu13_driver_if.h"



#define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
@@ -100,14 +100,6 @@ void dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool e 
			DALSMC_MSG_SetFclkSwitchAllow, enable ? FCLK_PSTATE_SUPPORTED : FCLK_PSTATE_NOTSUPPORTED, NULL);

}



void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr)

{

       smu_print("SMU Transfer WM table DRAM 2 SMU\n");



       dcn32_smu_send_msg_with_param(clk_mgr,

                       DALSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS, NULL);

}



void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways)

{

	smu_print("Numways for SubVP : %d\n", num_ways);
@@ -115,3 +107,10 @@ void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsig 
	dcn32_smu_send_msg_with_param(clk_mgr, DALSMC_MSG_SetCabForUclkPstate, num_ways, NULL);

}



void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr)

{

	smu_print("SMU Transfer WM table DRAM 2 SMU\n");



	dcn32_smu_send_msg_with_param(clk_mgr,

			DALSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS, NULL);

}

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h

+2 −5
Original line number Diff line number Diff line
@@ -37,12 +37,9 @@ 
#define DALSMC_Result_OK				0x1



void

dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr,

				   bool enable);



dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable);

void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);



void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways);



void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);



#endif /* __DCN32_CLK_MGR_SMU_MSG_H_ */

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_smu13_driver_if.h

0 → 100644
+63 −0
Original line number Diff line number Diff line 
// This is a stripped-down version of the smu13_driver_if.h file for the relevant DAL interfaces.



#define SMU13_DRIVER_IF_VERSION  0x18



//Only Clks that have DPM descriptors are listed here

typedef enum {

	PPCLK_GFXCLK = 0,

	PPCLK_SOCCLK,

	PPCLK_UCLK,

	PPCLK_FCLK,

	PPCLK_DCLK_0,

	PPCLK_VCLK_0,

	PPCLK_DCLK_1,

	PPCLK_VCLK_1,

	PPCLK_DISPCLK,

	PPCLK_DPPCLK,

	PPCLK_DPREFCLK,

	PPCLK_DCFCLK,

	PPCLK_DTBCLK,

	PPCLK_COUNT,

} PPCLK_e;



typedef struct {

	uint8_t  WmSetting;

	uint8_t  Flags;

	uint8_t  Padding[2];



} WatermarkRowGeneric_t;



#define NUM_WM_RANGES 4



typedef enum {

	WATERMARKS_CLOCK_RANGE = 0,

	WATERMARKS_DUMMY_PSTATE,

	WATERMARKS_MALL,

	WATERMARKS_COUNT,

} WATERMARKS_FLAGS_e;



typedef struct {

	// Watermarks

	WatermarkRowGeneric_t WatermarkRow[NUM_WM_RANGES];

} Watermarks_t;



typedef struct {

	Watermarks_t Watermarks;

	uint32_t  Spare[16];



	uint32_t     MmHubPadding[8]; // SMU internal use

} WatermarksExternal_t;



// Table types

#define TABLE_PMFW_PPTABLE            0

#define TABLE_COMBO_PPTABLE           1

#define TABLE_WATERMARKS              2

#define TABLE_AVFS_PSM_DEBUG          3

#define TABLE_PMSTATUSLOG             4

#define TABLE_SMU_METRICS             5

#define TABLE_DRIVER_SMU_CONFIG       6

#define TABLE_ACTIVITY_MONITOR_COEFF  7

#define TABLE_OVERDRIVE               8

#define TABLE_I2C_COMMANDS            9

#define TABLE_DRIVER_INFO             10

#define TABLE_COUNT                   11

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

+4 −1
Original line number Diff line number Diff line
@@ -39,7 +39,10 @@ 


const struct dmub_srv_dcn32_regs dmub_srv_dcn32_regs = {

#define DMUB_SR(reg) REG_OFFSET_EXP(reg),

		{ DMUB_DCN32_REGS() },

	{

		DMUB_DCN32_REGS()

		DMCUB_INTERNAL_REGS()

	},

#undef DMUB_SR



#define DMUB_SF(reg, field) FD_MASK(reg, field),