Commit 80f940ef authored by Harsha's avatar Harsha Committed by Herbert Xu
Browse files

firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality 



This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute
SHA3 hash of given data.

Signed-off-by: default avatarHarsha <harsha.harsha@xilinx.com>
Signed-off-by: default avatarKalyani Akula <kalyani.akula@xilinx.com>
Acked-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 52af29ab

drivers/firmware/xilinx/zynqmp.c

+26 −0
Original line number Diff line number Diff line
@@ -1120,6 +1120,32 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out) 
}

EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);



/**

 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash

 * @address:	Address of the data/ Address of output buffer where

 *		hash should be stored.

 * @size:	Size of the data.

 * @flags:

 *	BIT(0) - for initializing csudma driver and SHA3(Here address

 *		 and size inputs can be NULL).

 *	BIT(1) - to call Sha3_Update API which can be called multiple

 *		 times when data is not contiguous.

 *	BIT(2) - to get final hash of the whole updated data.

 *		 Hash will be overwritten at provided address with

 *		 48 bytes.

 *

 * Return:	Returns status, either success or error code.

 */

int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)

{

	u32 lower_addr = lower_32_bits(address);

	u32 upper_addr = upper_32_bits(address);



	return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,

				   size, flags, NULL);

}

EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);



/**

 * zynqmp_pm_register_notifier() - PM API for register a subsystem

 *                                to be notified about specific

include/linux/firmware/xlnx-zynqmp.h

+8 −0
Original line number Diff line number Diff line
@@ -93,6 +93,7 @@ enum pm_api_id { 
	PM_FPGA_LOAD = 22,

	PM_FPGA_GET_STATUS = 23,

	PM_GET_CHIPID = 24,

	PM_SECURE_SHA = 26,

	PM_PINCTRL_REQUEST = 28,

	PM_PINCTRL_RELEASE = 29,

	PM_PINCTRL_GET_FUNCTION = 30,
@@ -427,6 +428,7 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 
			      const u32 qos,

			      const enum zynqmp_pm_request_ack ack);

int zynqmp_pm_aes_engine(const u64 address, u32 *out);

int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);

int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);

int zynqmp_pm_fpga_get_status(u32 *value);

int zynqmp_pm_write_ggs(u32 index, u32 value);
@@ -601,6 +603,12 @@ static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out) 
	return -ENODEV;

}



static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,

				     const u32 flags)

{

	return -ENODEV;

}



static inline int zynqmp_pm_fpga_load(const u64 address, const u32 size,

				      const u32 flags)

{