Commit 8094892d authored by Jordan Niethe's avatar Jordan Niethe Committed by Michael Ellerman
Browse files

powerpc: Use a function for getting the instruction op code



In preparation for using a data type for instructions that can not be
directly used with the '>>' operator use a function for getting the op
code of an instruction.

Signed-off-by: default avatarJordan Niethe <jniethe5@gmail.com>
Reviewed-by: default avatarAlistair Popple <alistair@popple.id.au>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200506034050.24806-9-jniethe5@gmail.com
parent 777e26f0
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+5 −0
Original line number Diff line number Diff line
@@ -13,4 +13,9 @@ static inline u32 ppc_inst_val(u32 x)
	return x;
}

static inline int ppc_inst_primary_opcode(u32 x)
{
	return ppc_inst_val(x) >> 26;
}

#endif /* _ASM_POWERPC_INST_H */
+1 −1
Original line number Diff line number Diff line
@@ -314,7 +314,7 @@ int fix_alignment(struct pt_regs *regs)
	}

#ifdef CONFIG_SPE
	if ((ppc_inst_val(instr) >> 26) == 0x4) {
	if (ppc_inst_primary_opcode(instr) == 0x4) {
		int reg = (ppc_inst_val(instr) >> 21) & 0x1f;
		PPC_WARN_ALIGNMENT(spe, regs);
		return emulate_spe(regs, reg, instr);
+2 −1
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@
#include <asm/processor.h>
#include <asm/switch_to.h>
#include <linux/uaccess.h>
#include <asm/inst.h>

/* Functions in vector.S */
extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
@@ -268,7 +269,7 @@ int emulate_altivec(struct pt_regs *regs)
		return -EFAULT;

	word = ppc_inst_val(instr);
	if ((word >> 26) != 4)
	if (ppc_inst_primary_opcode(instr) != 4)
		return -EINVAL;		/* not an altivec instruction */
	vd = (word >> 21) & 0x1f;
	va = (word >> 16) & 0x1f;
+2 −2
Original line number Diff line number Diff line
@@ -231,7 +231,7 @@ bool is_offset_in_branch_range(long offset)
 */
bool is_conditional_branch(unsigned int instr)
{
	unsigned int opcode = instr >> 26;
	unsigned int opcode = ppc_inst_primary_opcode(instr);

	if (opcode == 16)       /* bc, bca, bcl, bcla */
		return true;
@@ -289,7 +289,7 @@ int create_cond_branch(unsigned int *instr, const unsigned int *addr,

static unsigned int branch_opcode(unsigned int instr)
{
	return (instr >> 26) & 0x3F;
	return ppc_inst_primary_opcode(instr) & 0x3F;
}

static int instr_is_branch_iform(unsigned int instr)
+1 −1
Original line number Diff line number Diff line
@@ -1175,7 +1175,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
	word = ppc_inst_val(instr);
	op->type = COMPUTE;

	opcode = instr >> 26;
	opcode = ppc_inst_primary_opcode(instr);
	switch (opcode) {
	case 16:	/* bc */
		op->type = BRANCH;
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