Commit 809159ee authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'octeontx2-misc-fixes' 



Sunil Goutham says:

====================
octeontx2: Miscellaneous fixes

This patch series contains a bunch of miscellaneous fixes
for various issues like
- Free unallocated memory during driver unload
- HW reading transmit descriptor from wrong address
- VF VLAN strip offload MCAM entry installation failure
- Pkts not being distributed across queues in RSS context
- Wrong interface backpressure configuration for NIX1 block on 98xx
- etc
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 5d1c5594 623da5ca

drivers/net/ethernet/marvell/octeontx2/af/common.h

+6 −7
Original line number Diff line number Diff line
@@ -64,8 +64,8 @@ static inline int qmem_alloc(struct device *dev, struct qmem **q, 


	qmem->entry_sz = entry_sz;

	qmem->alloc_sz = (qsize * entry_sz) + OTX2_ALIGN;

	qmem->base = dma_alloc_coherent(dev, qmem->alloc_sz,

					 &qmem->iova, GFP_KERNEL);

	qmem->base = dma_alloc_attrs(dev, qmem->alloc_sz, &qmem->iova,

				     GFP_KERNEL, DMA_ATTR_FORCE_CONTIGUOUS);

	if (!qmem->base)

		return -ENOMEM;
@@ -84,9 +84,10 @@ static inline void qmem_free(struct device *dev, struct qmem *qmem) 
		return;



	if (qmem->base)

		dma_free_coherent(dev, qmem->alloc_sz,

		dma_free_attrs(dev, qmem->alloc_sz,

			       qmem->base - qmem->align,

				  qmem->iova - qmem->align);

			       qmem->iova - qmem->align,

			       DMA_ATTR_FORCE_CONTIGUOUS);

	devm_kfree(dev, qmem);

}
@@ -192,8 +193,6 @@ enum nix_scheduler { 
#define NIX_CHAN_LBK_CHX(a, b)		(0 + 0x100 * (a) + (b))

#define NIX_CHAN_SDP_CH_START		(0x700ull)



#define SDP_CHANNELS			256



/* The mask is to extract lower 10-bits of channel number

 * which CPT will pass to X2P.

 */

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+4 −1
Original line number Diff line number Diff line
@@ -498,12 +498,15 @@ int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf) 
static void rvu_block_reset(struct rvu *rvu, int blkaddr, u64 rst_reg)

{

	struct rvu_block *block = &rvu->hw->block[blkaddr];

	int err;



	if (!block->implemented)

		return;



	rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));

	rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);

	err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);

	if (err)

		dev_err(rvu->dev, "HW block:%d reset failed\n", blkaddr);

}



static void rvu_reset_all_blocks(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

+24 −11
Original line number Diff line number Diff line
@@ -82,10 +82,10 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, 
		dev_err(rvu->dev, "%s LMTLINE iova transulation failed err:%llx\n", __func__, val);

		return -EIO;

	}

	/* PA[51:12] = RVU_AF_SMMU_TLN_FLIT1[60:21]

	/* PA[51:12] = RVU_AF_SMMU_TLN_FLIT0[57:18]

	 * PA[11:0] = IOVA[11:0]

	 */

	pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT1) >> 21;

	pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18;

	pa &= GENMASK_ULL(39, 0);

	*lmt_addr = (pa << 12) | (iova  & 0xFFF);
@@ -212,9 +212,10 @@ void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc) 


int rvu_set_channels_base(struct rvu *rvu)

{

	u16 nr_lbk_chans, nr_sdp_chans, nr_cgx_chans, nr_cpt_chans;

	u16 sdp_chan_base, cgx_chan_base, cpt_chan_base;

	struct rvu_hwinfo *hw = rvu->hw;

	u16 cpt_chan_base;

	u64 nix_const;

	u64 nix_const, nix_const1;

	int blkaddr;



	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
@@ -222,6 +223,7 @@ int rvu_set_channels_base(struct rvu *rvu) 
		return blkaddr;



	nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST);

	nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);



	hw->cgx = (nix_const >> 12) & 0xFULL;

	hw->lmac_per_cgx = (nix_const >> 8) & 0xFULL;
@@ -244,14 +246,24 @@ int rvu_set_channels_base(struct rvu *rvu) 
	 * channels such that all channel numbers are contiguous

	 * leaving no holes. This way the new CPT channels can be

	 * accomodated. The order of channel numbers assigned is

	 * LBK, SDP, CGX and CPT.

	 * LBK, SDP, CGX and CPT. Also the base channel number

	 * of a block must be multiple of number of channels

	 * of the block.

	 */

	hw->sdp_chan_base = hw->lbk_chan_base + hw->lbk_links *

				((nix_const >> 16) & 0xFFULL);

	hw->cgx_chan_base = hw->sdp_chan_base + hw->sdp_links * SDP_CHANNELS;

	nr_lbk_chans = (nix_const >> 16) & 0xFFULL;

	nr_sdp_chans = nix_const1 & 0xFFFULL;

	nr_cgx_chans = nix_const & 0xFFULL;

	nr_cpt_chans = (nix_const >> 32) & 0xFFFULL;



	cpt_chan_base = hw->cgx_chan_base + hw->cgx_links *

				(nix_const & 0xFFULL);

	sdp_chan_base = hw->lbk_chan_base + hw->lbk_links * nr_lbk_chans;

	/* Round up base channel to multiple of number of channels */

	hw->sdp_chan_base = ALIGN(sdp_chan_base, nr_sdp_chans);



	cgx_chan_base = hw->sdp_chan_base + hw->sdp_links * nr_sdp_chans;

	hw->cgx_chan_base = ALIGN(cgx_chan_base, nr_cgx_chans);



	cpt_chan_base = hw->cgx_chan_base + hw->cgx_links * nr_cgx_chans;

	hw->cpt_chan_base = ALIGN(cpt_chan_base, nr_cpt_chans);



	/* Out of 4096 channels start CPT from 2048 so

	 * that MSB for CPT channels is always set
@@ -355,6 +367,7 @@ static void rvu_lbk_set_channels(struct rvu *rvu) 


static void __rvu_nix_set_channels(struct rvu *rvu, int blkaddr)

{

	u64 nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

	u64 nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST);

	u16 cgx_chans, lbk_chans, sdp_chans, cpt_chans;

	struct rvu_hwinfo *hw = rvu->hw;
@@ -364,7 +377,7 @@ static void __rvu_nix_set_channels(struct rvu *rvu, int blkaddr) 


	cgx_chans = nix_const & 0xFFULL;

	lbk_chans = (nix_const >> 16) & 0xFFULL;

	sdp_chans = SDP_CHANNELS;

	sdp_chans = nix_const1 & 0xFFFULL;

	cpt_chans = (nix_const >> 32) & 0xFFFULL;



	start = hw->cgx_chan_base;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+6 −3
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc, 
			       int type, bool add);

static int nix_setup_ipolicers(struct rvu *rvu,

			       struct nix_hw *nix_hw, int blkaddr);

static void nix_ipolicer_freemem(struct nix_hw *nix_hw);

static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw);

static int nix_verify_bandprof(struct nix_cn10k_aq_enq_req *req,

			       struct nix_hw *nix_hw, u16 pcifunc);

static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc);
@@ -3965,7 +3965,7 @@ static void rvu_nix_block_freemem(struct rvu *rvu, int blkaddr, 
			kfree(txsch->schq.bmap);

		}



		nix_ipolicer_freemem(nix_hw);

		nix_ipolicer_freemem(rvu, nix_hw);



		vlan = &nix_hw->txvlan;

		kfree(vlan->rsrc.bmap);
@@ -4341,11 +4341,14 @@ static int nix_setup_ipolicers(struct rvu *rvu, 
	return 0;

}



static void nix_ipolicer_freemem(struct nix_hw *nix_hw)

static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw)

{

	struct nix_ipolicer *ipolicer;

	int layer;



	if (!rvu->hw->cap.ipolicer)

		return;



	for (layer = 0; layer < BAND_PROF_NUM_LAYERS; layer++) {

		ipolicer = &nix_hw->ipolicer[layer];

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ 
#define RVU_AF_SMMU_TXN_REQ		    (0x6008)

#define RVU_AF_SMMU_ADDR_RSP_STS	    (0x6010)

#define RVU_AF_SMMU_ADDR_TLN		    (0x6018)

#define RVU_AF_SMMU_TLN_FLIT1		    (0x6030)

#define RVU_AF_SMMU_TLN_FLIT0		    (0x6020)



/* Admin function's privileged PF/VF registers */

#define RVU_PRIV_CONST                      (0x8000000)