Commit 80706f55 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-fixes-6.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC fixes from Arnd Bergmann:
 "As usual, mostly DT fixes for the major Arm platforms from Qualcomm
  and NXP, plus a bit for Rockchips and others:

  The qualcomm fixes mainly deal with their higher-end arm64 devices
  trees, fixing issues in L3 interconnect, crypto, thermal, UFS and a
  regression for the DSI phy.

  NXP i.MX has two correctness fixes for the 64-bit chips, dealing with
  the imx93 "anatop" module and the CSI interface. On the 32-bit side,
  there are functional fixes for RTC, display and SD card intefaces.

  Rockchip fixes are for wifi support on certain boards, a eMMC
  stability and DT build warnings.

  On TI OMAP, a regulator is described in DT to avoid problems with the
  ethernet phy initialization.

  The code changes include a missing MMIO serialization on OMAP, plus a
  few minor fixes on ASpeed and AMD/Zynq chips"

* tag 'soc-fixes-6.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
  ARM: dts: am335x-bone-common: Add vcc-supply for on-board eeprom
  ARM: dts: am335x-bone-common: Add GPIO PHY reset on revision C3 board
  soc: aspeed: socinfo: Add kfree for kstrdup
  soc: aspeed: uart-routing: Use __sysfs_match_string
  ARM: dts: integrator: fix PCI bus dtc warnings
  arm64: dts: imx93: Fix anatop node size
  arm64: dts: qcom: sc7180: Fix DSI0_PHY reg-names
  ARM: dts: imx: Set default tuning step for imx6sx usdhc
  arm64: dts: imx8mm: Drop CSI1 PHY reference clock configuration
  arm64: dts: imx8mn: Drop CSI1 PHY reference clock configuration
  ARM: dts: imx: Set default tuning step for imx7d usdhc
  ARM: dts: imx6: phytec: fix RTC interrupt level
  ARM: dts: imx6sx: Remove LDB endpoint
  arm64: dts: rockchip: Fix Wifi/Bluetooth on ROCK Pi 4 boards
  ARM: zynq: Explicitly include correct DT includes
  arm64: dts: qcom: sa8775p-ride: Update L4C parameters
  arm64: dts: rockchip: minor whitespace cleanup around '='
  arm64: dts: rockchip: Disable HS400 for eMMC on ROCK 4C+
  arm64: dts: rockchip: Disable HS400 for eMMC on ROCK Pi 4
  arm64: dts: rockchip: add missing space before { on indiedroid nova
  ...
parents eabeef90 3c78dbf2

arch/arm/boot/dts/arm/integratorap.dts

+1 −1
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ 
		valid-mask = <0x003fffff>;

	};



	pci: pciv3@62000000 {

	pci: pci@62000000 {

		compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";

		device_type = "pci";

		#interrupt-cells = <1>;

arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ 
		pinctrl-0 = <&pinctrl_rtc_int>;

		reg = <0x68>;

		interrupt-parent = <&gpio7>;

		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;

		status = "disabled";

	};

};

arch/arm/boot/dts/nxp/imx/imx6sx.dtsi

+8 −6
Original line number Diff line number Diff line
@@ -863,7 +863,6 @@ 
							reg = <0>;



							ldb_from_lcdif1: endpoint {

								remote-endpoint = <&lcdif1_to_ldb>;

							};

						};
@@ -1010,6 +1009,8 @@ 
					 <&clks IMX6SX_CLK_USDHC1>;

				clock-names = "ipg", "ahb", "per";

				bus-width = <4>;

				fsl,tuning-start-tap = <20>;

				fsl,tuning-step= <2>;

				status = "disabled";

			};
@@ -1022,6 +1023,8 @@ 
					 <&clks IMX6SX_CLK_USDHC2>;

				clock-names = "ipg", "ahb", "per";

				bus-width = <4>;

				fsl,tuning-start-tap = <20>;

				fsl,tuning-step= <2>;

				status = "disabled";

			};
@@ -1034,6 +1037,8 @@ 
					 <&clks IMX6SX_CLK_USDHC3>;

				clock-names = "ipg", "ahb", "per";

				bus-width = <4>;

				fsl,tuning-start-tap = <20>;

				fsl,tuning-step= <2>;

				status = "disabled";

			};
@@ -1309,11 +1314,8 @@ 
					power-domains = <&pd_disp>;

					status = "disabled";



					ports {

					port {

						lcdif1_to_ldb: endpoint {

								remote-endpoint = <&ldb_from_lcdif1>;

							};

						};

					};

				};

arch/arm/boot/dts/nxp/imx/imx7s.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -1184,6 +1184,8 @@ 
					<&clks IMX7D_USDHC1_ROOT_CLK>;

				clock-names = "ipg", "ahb", "per";

				bus-width = <4>;

				fsl,tuning-step = <2>;

				fsl,tuning-start-tap = <20>;

				status = "disabled";

			};
@@ -1196,6 +1198,8 @@ 
					<&clks IMX7D_USDHC2_ROOT_CLK>;

				clock-names = "ipg", "ahb", "per";

				bus-width = <4>;

				fsl,tuning-step = <2>;

				fsl,tuning-start-tap = <20>;

				status = "disabled";

			};
@@ -1208,6 +1212,8 @@ 
					<&clks IMX7D_USDHC3_ROOT_CLK>;

				clock-names = "ipg", "ahb", "per";

				bus-width = <4>;

				fsl,tuning-step = <2>;

				fsl,tuning-start-tap = <20>;

				status = "disabled";

			};

arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -145,6 +145,8 @@ 
			/* MDIO */

			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)

			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)

			/* Added to support GPIO controlled PHY reset */

			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE7)

		>;

	};
@@ -153,6 +155,8 @@ 
			/* MDIO reset value */

			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)

			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)

			/* Added to support GPIO controlled PHY reset */

			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)

		>;

	};
@@ -215,6 +219,7 @@ 
	baseboard_eeprom: baseboard_eeprom@50 {

		compatible = "atmel,24c256";

		reg = <0x50>;

		vcc-supply = <&ldo4_reg>;



		#address-cells = <1>;

		#size-cells = <1>;
@@ -377,6 +382,10 @@ 


	ethphy0: ethernet-phy@0 {

		reg = <0>;

		/* Support GPIO reset on revision C3 boards */

		reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;

		reset-assert-us = <300>;

		reset-deassert-us = <6500>;

	};

};