Commit 806acd38 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-5.16-2021-11-03' of... 

Merge tag 'amd-drm-fixes-5.16-2021-11-03' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-fixes-5.16-2021-11-03:

amdgpu:
- GPU reset fix
- Aldebaran fix
- Yellow Carp fixes
- DCN2.1 DMCUB fix
- IOMMU regression fix for Picasso
- DSC display fixes
- BPC display calculation fixes
- Other misc display fixes

amdkfd:
- SVM fixes
- Fix gfx version for renoir

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211104024447.4535-1-alexander.deucher@amd.com
parents 5275a99e 78469728

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+4 −4
Original line number Diff line number Diff line
@@ -2398,10 +2398,6 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev) 
	if (!adev->gmc.xgmi.pending_reset)

		amdgpu_amdkfd_device_init(adev);



	r = amdgpu_amdkfd_resume_iommu(adev);

	if (r)

		goto init_failed;



	amdgpu_fru_get_product_info(adev);



init_failed:
@@ -4850,6 +4846,9 @@ static void amdgpu_device_recheck_guilty_jobs( 


		/* clear job's guilty and depend the folowing step to decide the real one */

		drm_sched_reset_karma(s_job);

		/* for the real bad job, it will be resubmitted twice, adding a dma_fence_get

		 * to make sure fence is balanced */

		dma_fence_get(s_job->s_fence->parent);

		drm_sched_resubmit_jobs_ext(&ring->sched, 1);



		ret = dma_fence_wait_timeout(s_job->s_fence->parent, false, ring->sched.timeout);
@@ -4885,6 +4884,7 @@ static void amdgpu_device_recheck_guilty_jobs( 


		/* got the hw fence, signal finished fence */

		atomic_dec(ring->sched.score);

		dma_fence_put(s_job->s_fence->parent);

		dma_fence_get(&s_job->s_fence->finished);

		dma_fence_signal(&s_job->s_fence->finished);

		dma_fence_put(&s_job->s_fence->finished);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+7 −2
Original line number Diff line number Diff line
@@ -1423,6 +1423,8 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) 
	struct drm_amdgpu_info_firmware fw_info;

	struct drm_amdgpu_query_fw query_fw;

	struct atom_context *ctx = adev->mode_info.atom_context;

	uint8_t smu_minor, smu_debug;

	uint16_t smu_major;

	int ret, i;



	static const char *ta_fw_name[TA_FW_TYPE_MAX_INDEX] = {
@@ -1568,8 +1570,11 @@ static int amdgpu_debugfs_firmware_info_show(struct seq_file *m, void *unused) 
	ret = amdgpu_firmware_info(&fw_info, &query_fw, adev);

	if (ret)

		return ret;

	seq_printf(m, "SMC feature version: %u, firmware version: 0x%08x\n",

		   fw_info.feature, fw_info.ver);

	smu_major = (fw_info.ver >> 16) & 0xffff;

	smu_minor = (fw_info.ver >> 8) & 0xff;

	smu_debug = (fw_info.ver >> 0) & 0xff;

	seq_printf(m, "SMC feature version: %u, firmware version: 0x%08x (%d.%d.%d)\n",

		   fw_info.feature, fw_info.ver, smu_major, smu_minor, smu_debug);



	/* SDMA */

	query_fw.fw_type = AMDGPU_INFO_FW_SDMA;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+1 −4
Original line number Diff line number Diff line
@@ -8316,11 +8316,8 @@ static void gfx_v10_cntl_power_gating(struct amdgpu_device *adev, bool enable) 
	if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {

		switch (adev->ip_versions[GC_HWIP][0]) {

		case IP_VERSION(10, 3, 1):

			data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;

			WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);

			break;

		case IP_VERSION(10, 3, 3):

			data = 0x1388 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;

			data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;

			WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);

			break;

		default:

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

+13 −5
Original line number Diff line number Diff line
@@ -54,15 +54,17 @@ int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev) 
		seg_size = REG_GET_FIELD(

			RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE_ALDE),

			MC_VM_XGMI_LFB_SIZE, PF_LFB_SIZE) << 24;

		max_region =

			REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, PF_MAX_REGION);

	} else {

		xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL);

		seg_size = REG_GET_FIELD(

			RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE),

			MC_VM_XGMI_LFB_SIZE, PF_LFB_SIZE) << 24;

	}



		max_region =

			REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);

	}







	switch (adev->asic_type) {
@@ -89,9 +91,15 @@ int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev) 
		if (adev->gmc.xgmi.num_physical_nodes > max_num_physical_nodes)

			return -EINVAL;



		if (adev->asic_type == CHIP_ALDEBARAN) {

			adev->gmc.xgmi.physical_node_id =

				REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE,

						PF_LFB_REGION);

		} else {

			adev->gmc.xgmi.physical_node_id =

				REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL,

						PF_LFB_REGION);

		}



		if (adev->gmc.xgmi.physical_node_id > max_physical_node_id)

			return -EINVAL;

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+1 −1
Original line number Diff line number Diff line
@@ -406,7 +406,7 @@ static const struct kfd_device_info aldebaran_device_info = { 
static const struct kfd_device_info renoir_device_info = {

	.asic_family = CHIP_RENOIR,

	.asic_name = "renoir",

	.gfx_target_version = 90002,

	.gfx_target_version = 90012,

	.max_pasid_bits = 16,

	.max_no_of_hqd  = 24,

	.doorbell_size  = 8,