Commit 8067f62b authored by Jerome Brunet's avatar Jerome Brunet Committed by Neil Armstrong
Browse files

drm/bridge: dw-hdmi-i2s: support more i2s format 



The dw-hdmi-i2s supports more formats than just regular i2s.
Add support for left justified, right justified and dsp modes
A and B.

Reviewed-by: default avatarJonas Karlman <jonas@kwiboo.se>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190812120726.1528-2-jbrunet@baylibre.com
parent c0900eb8

drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c

+23 −3
Original line number Diff line number Diff line
@@ -44,9 +44,8 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, 
	u8 inputclkfs = 0;



	/* it cares I2S only */

	if ((fmt->fmt != HDMI_I2S) ||

	    (fmt->bit_clk_master | fmt->frame_clk_master)) {

		dev_err(dev, "unsupported format/settings\n");

	if (fmt->bit_clk_master | fmt->frame_clk_master) {

		dev_err(dev, "unsupported clock settings\n");

		return -EINVAL;

	}
@@ -63,6 +62,27 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, 
		break;

	}



	switch (fmt->fmt) {

	case HDMI_I2S:

		conf1 |= HDMI_AUD_CONF1_MODE_I2S;

		break;

	case HDMI_RIGHT_J:

		conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J;

		break;

	case HDMI_LEFT_J:

		conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J;

		break;

	case HDMI_DSP_A:

		conf1 |= HDMI_AUD_CONF1_MODE_BURST_1;

		break;

	case HDMI_DSP_B:

		conf1 |= HDMI_AUD_CONF1_MODE_BURST_2;

		break;

	default:

		dev_err(dev, "unsupported format\n");

		return -EINVAL;

	}



	dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);



	hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);

drivers/gpu/drm/bridge/synopsys/dw-hdmi.h

+4 −2
Original line number Diff line number Diff line
@@ -869,8 +869,10 @@ enum { 


/* AUD_CONF1 field values */

	HDMI_AUD_CONF1_MODE_I2S = 0x00,

	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,

	HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,

	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x20,

	HDMI_AUD_CONF1_MODE_LEFT_J = 0x40,

	HDMI_AUD_CONF1_MODE_BURST_1 = 0x60,

	HDMI_AUD_CONF1_MODE_BURST_2 = 0x80,

	HDMI_AUD_CONF1_WIDTH_16 = 0x10,

	HDMI_AUD_CONF1_WIDTH_24 = 0x18,