Commit 805e6ec1 authored by Akihiko Odaki's avatar Akihiko Odaki Committed by Oliver Upton
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arm64/cache: Move CLIDR macro definitions 



The macros are useful for KVM which needs to manage how CLIDR is exposed
to vcpu so move them to include/asm/cache.h, which KVM can refer to.

Signed-off-by: default avatarAkihiko Odaki <akihiko.odaki@daynix.com>
Link: https://lore.kernel.org/r/20230112023852.42012-5-akihiko.odaki@daynix.com


Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
parent 8f407d6a

arch/arm64/include/asm/cache.h

+6 −0
Original line number Diff line number Diff line
@@ -16,6 +16,12 @@ 
#define CLIDR_LOC(clidr)	(((clidr) >> CLIDR_LOC_SHIFT) & 0x7)

#define CLIDR_LOUIS(clidr)	(((clidr) >> CLIDR_LOUIS_SHIFT) & 0x7)



/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */

#define CLIDR_CTYPE_SHIFT(level)	(3 * (level - 1))

#define CLIDR_CTYPE_MASK(level)		(7 << CLIDR_CTYPE_SHIFT(level))

#define CLIDR_CTYPE(clidr, level)	\

	(((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))



/*

 * Memory returned by kmalloc() may be used for DMA, so we must make

 * sure that all such allocations are cache aligned. Otherwise,

arch/arm64/kernel/cacheinfo.c

+0 −5
Original line number Diff line number Diff line
@@ -11,11 +11,6 @@ 
#include <linux/of.h>



#define MAX_CACHE_LEVEL			7	/* Max 7 level supported */

/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */

#define CLIDR_CTYPE_SHIFT(level)	(3 * (level - 1))

#define CLIDR_CTYPE_MASK(level)		(7 << CLIDR_CTYPE_SHIFT(level))

#define CLIDR_CTYPE(clidr, level)	\

	(((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))



int cache_line_size(void)

{