Unverified Commit 803fa58d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-5.18' of... 

Merge tag 'imx-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.18:

- Increase DOMAIN_MAX_CLKS in imx8m-blk-ctrl driver to fix an ISI hang
  on i.MX8MN.
- Fix spi-tx-bus-width on imx8mq-tqma8mq board.
- Fix an SGTL5000 detection issue by moving MCLK pinctrl into SGTL5000
  codec node.
- Fix spi2 pin configuration on imx8mm-venice board.
- Fix SCU clock controller's compatible property for i.MX8QM.
- Fix SAI device compatible for i.MX8MN.
- A couple of fixes from Rob to address issues in boolean properties
  and touchscreen property sizes.
- Fix OTG controller over-current configuration for imx8mm-venice-gw
  boards.
- Fix NULL but dereferenced coccicheck error in imx-weim driver.

* tag 'imx-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx: Fix imx8*-var-som touchscreen property sizes
  ARM: dts: imx: Fix boolean properties with values
  ARM: dts: imx8mm-venice-gw{71xx,72xx,73xx}: fix OTG controller OC mode
  arm64: dts: imx8mn: Fix SAI nodes
  arm64: dts: imx8mq-tqma8mq: change the spi-nor tx
  ARM: dts: imx6qdl-apalis: Fix sgtl5000 detection issue
  soc: imx: imx8m-blk-ctrl: Fix IMX8MN_DISPBLK_PD_ISI hang
  arm64: dts: imx8qm: Correct SCU clock controller's compatible property
  arm64: dts: imx8mm-venice: fix spi2 pin configuration
  bus: imx-weim: fix NULL but dereferenced coccicheck error

Link: https://lore.kernel.org/r/20220411024301.GH129381@dragon


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 24a4351e f571e9c9

arch/arm/boot/dts/imx6qdl-apalis.dtsi

+8 −2
Original line number Diff line number Diff line
@@ -286,6 +286,8 @@ 
	codec: sgtl5000@a {

		compatible = "fsl,sgtl5000";

		reg = <0x0a>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_sgtl5000>;

		clocks = <&clks IMX6QDL_CLK_CKO>;

		VDDA-supply = <&reg_module_3v3_audio>;

		VDDIO-supply = <&reg_module_3v3>;
@@ -517,8 +519,6 @@ 
			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD	0x130b0

			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS	0x130b0

			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD	0x130b0

			/* SGTL5000 sys_mclk */

			MX6QDL_PAD_GPIO_5__CCM_CLKO1		0x130b0

		>;

	};
@@ -811,6 +811,12 @@ 
		>;

	};



	pinctrl_sgtl5000: sgtl5000grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_5__CCM_CLKO1	0x130b0

		>;

	};



	pinctrl_spdif: spdifgrp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0

arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -146,12 +146,14 @@ 


&usbotg1 {

	dr_mode = "otg";

	over-current-active-low;

	vbus-supply = <&reg_usb_otg1_vbus>;

	status = "okay";

};



&usbotg2 {

	dr_mode = "host";

	disable-over-current;

	status = "okay";

};
@@ -215,7 +217,7 @@ 
		fsl,pins = <

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6

			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6

			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0xd6

			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6

		>;

	};

arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -211,12 +211,14 @@ 


&usbotg1 {

	dr_mode = "otg";

	over-current-active-low;

	vbus-supply = <&reg_usb_otg1_vbus>;

	status = "okay";

};



&usbotg2 {

	dr_mode = "host";

	disable-over-current;

	vbus-supply = <&reg_usb_otg2_vbus>;

	status = "okay";

};
@@ -309,7 +311,7 @@ 
		fsl,pins = <

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6

			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6

			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0xd6

			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6

		>;

	};

arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -238,12 +238,14 @@ 


&usbotg1 {

	dr_mode = "otg";

	over-current-active-low;

	vbus-supply = <&reg_usb_otg1_vbus>;

	status = "okay";

};



&usbotg2 {

	dr_mode = "host";

	disable-over-current;

	vbus-supply = <&reg_usb_otg2_vbus>;

	status = "okay";

};
@@ -358,7 +360,7 @@ 
		fsl,pins = <

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6

			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6

			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6

			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0xd6

			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6

		>;

	};

arch/arm64/boot/dts/freescale/imx8mn.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -293,7 +293,7 @@ 
				ranges;



				sai2: sai@30020000 {

					compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";

					compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";

					reg = <0x30020000 0x10000>;

					interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
@@ -307,7 +307,7 @@ 
				};



				sai3: sai@30030000 {

					compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";

					compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";

					reg = <0x30030000 0x10000>;

					interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
@@ -321,7 +321,7 @@ 
				};



				sai5: sai@30050000 {

					compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";

					compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";

					reg = <0x30050000 0x10000>;

					interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
@@ -337,7 +337,7 @@ 
				};



				sai6: sai@30060000 {

					compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";

					compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";

					reg = <0x30060000  0x10000>;

					interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
@@ -394,7 +394,7 @@ 
				};



				sai7: sai@300b0000 {

					compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";

					compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";

					reg = <0x300b0000 0x10000>;

					interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clk IMX8MN_CLK_SAI7_IPG>,