Commit 7ff5d60f authored by Shang XiaoJing's avatar Shang XiaoJing Committed by Bjorn Andersson
Browse files

remoteproc: qcom: q6v5: Fix missing clk_disable_unprepare() in q6v5_wcss_qcs404_power_on() 



q6v5_wcss_qcs404_power_on() have no fail path for readl_poll_timeout().
Add fail path for readl_poll_timeout().

Fixes: 0af65b9b ("remoteproc: qcom: wcss: Add non pas wcss Q6 support for QCS404")
Signed-off-by: default avatarShang XiaoJing <shangxiaojing@huawei.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204082757.18850-1-shangxiaojing@huawei.com
parent 38e7d9c1

drivers/remoteproc/qcom_q6v5_wcss.c

+2 −1
Original line number Diff line number Diff line
@@ -351,7 +351,7 @@ static int q6v5_wcss_qcs404_power_on(struct q6v5_wcss *wcss) 
	if (ret) {

		dev_err(wcss->dev,

			"xo cbcr enabling timed out (rc:%d)\n", ret);

		return ret;

		goto disable_xo_cbcr_clk;

	}



	writel(0, wcss->reg_base + Q6SS_CGC_OVERRIDE);
@@ -417,6 +417,7 @@ static int q6v5_wcss_qcs404_power_on(struct q6v5_wcss *wcss) 
	val = readl(wcss->reg_base + Q6SS_SLEEP_CBCR);

	val &= ~Q6SS_CLK_ENABLE;

	writel(val, wcss->reg_base + Q6SS_SLEEP_CBCR);

disable_xo_cbcr_clk:

	val = readl(wcss->reg_base + Q6SS_XO_CBCR);

	val &= ~Q6SS_CLK_ENABLE;

	writel(val, wcss->reg_base + Q6SS_XO_CBCR);