Commit 7fc6d3ab authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-hns3-add-vlan-filter-control-support' 

Huazhong Tan says:

====================
net: hns3: add VLAN filter control support

This patchset add VLAN filter control support for HNS3 driver.
====================

Link: https://lore.kernel.org/r/1622428725-30049-1-git-send-email-tanhuazhong@huawei.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 0c2c366e 0ca821da

drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h

+9 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ enum HCLGE_MBX_OPCODE { 
	HCLGE_MBX_API_NEGOTIATE,	/* (VF -> PF) negotiate API version */

	HCLGE_MBX_GET_QINFO,		/* (VF -> PF) get queue config */

	HCLGE_MBX_GET_QDEPTH,		/* (VF -> PF) get queue depth */

	HCLGE_MBX_GET_TCINFO,		/* (VF -> PF) get TC config */

	HCLGE_MBX_GET_BASIC_INFO,	/* (VF -> PF) get basic info */

	HCLGE_MBX_GET_RETA,		/* (VF -> PF) get RETA */

	HCLGE_MBX_GET_RSS_KEY,		/* (VF -> PF) get RSS key */

	HCLGE_MBX_GET_MAC_ADDR,		/* (VF -> PF) get MAC addr */
@@ -69,6 +69,7 @@ enum hclge_mbx_vlan_cfg_subcode { 
	HCLGE_MBX_VLAN_RX_OFF_CFG,	/* set rx side vlan offload */

	HCLGE_MBX_PORT_BASE_VLAN_CFG,	/* set port based vlan configuration */

	HCLGE_MBX_GET_PORT_BASE_VLAN_STATE,	/* get port based vlan state */

	HCLGE_MBX_ENABLE_VLAN_FILTER,

};



enum hclge_mbx_tbl_cfg_subcode {
@@ -85,6 +86,13 @@ struct hclge_ring_chain_param { 
	u8 int_gl_index;

};



struct hclge_basic_info {

	u8 hw_tc_map;

	u8 rsv;

	u16 mbx_api_version;

	u32 pf_caps;

};



struct hclgevf_mbx_resp_status {

	struct mutex mbx_mutex; /* protects against contending sync cmd resp */

	u32 origin_mbx_msg;

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+7 −2
Original line number Diff line number Diff line
@@ -92,6 +92,8 @@ enum HNAE3_DEV_CAP_BITS { 
	HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,

	HNAE3_DEV_SUPPORT_PAUSE_B,

	HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,

	HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,

	HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,

};



#define hnae3_dev_fd_supported(hdev) \
@@ -145,6 +147,9 @@ enum HNAE3_DEV_CAP_BITS { 
#define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \

	test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)



enum HNAE3_PF_CAP_BITS {

	HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,

};

#define ring_ptr_move_fw(ring, p) \

	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)

#define ring_ptr_move_bw(ring, p) \
@@ -283,6 +288,7 @@ enum hnae3_dbg_cmd { 
	HNAE3_DBG_CMD_REG_TQP,

	HNAE3_DBG_CMD_REG_MAC,

	HNAE3_DBG_CMD_REG_DCB,

	HNAE3_DBG_CMD_VLAN_CONFIG,

	HNAE3_DBG_CMD_QUEUE_MAP,

	HNAE3_DBG_CMD_RX_QUEUE_INFO,

	HNAE3_DBG_CMD_TX_QUEUE_INFO,
@@ -631,7 +637,7 @@ struct hnae3_ae_ops { 
	void (*get_mdix_mode)(struct hnae3_handle *handle,

			      u8 *tp_mdix_ctrl, u8 *tp_mdix);



	void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);

	int (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);

	int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,

			       u16 vlan_id, bool is_kill);

	int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
@@ -783,7 +789,6 @@ struct hnae3_roce_private_info { 
#define HNAE3_BPE		BIT(2)	/* broadcast promisc enable */

#define HNAE3_OVERFLOW_UPE	BIT(3)	/* unicast mac vlan overflow */

#define HNAE3_OVERFLOW_MPE	BIT(4)	/* multicast mac vlan overflow */

#define HNAE3_VLAN_FLTR		BIT(5)	/* enable vlan filter */

#define HNAE3_UPE		(HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)

#define HNAE3_MPE		(HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

+14 −1
Original line number Diff line number Diff line
@@ -309,6 +309,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { 
		.buf_len = HNS3_DBG_READ_LEN,

		.init = hns3_dbg_common_file_init,

	},

	{

		.name = "vlan_config",

		.cmd = HNAE3_DBG_CMD_VLAN_CONFIG,

		.dentry = HNS3_DBG_DENTRY_COMMON,

		.buf_len = HNS3_DBG_READ_LEN,

		.init = hns3_dbg_common_file_init,

	},

};



static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
@@ -345,7 +352,13 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = { 
	}, {

		.name = "support rxd advanced layout",

		.cap_bit = HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,

	},

	}, {

		.name = "support port vlan bypass",

		.cap_bit = HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,

	}, {

		.name = "support modify vlan filter state",

		.cap_bit = HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,

	}

};



static void hns3_dbg_fill_content(char *content, u16 len,

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+14 −25
Original line number Diff line number Diff line
@@ -908,13 +908,10 @@ static u8 hns3_get_netdev_flags(struct net_device *netdev) 
{

	u8 flags = 0;



	if (netdev->flags & IFF_PROMISC) {

	if (netdev->flags & IFF_PROMISC)

		flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;

	} else {

		flags |= HNAE3_VLAN_FLTR;

		if (netdev->flags & IFF_ALLMULTI)

			flags |= HNAE3_USER_MPE;

	}

	else if (netdev->flags & IFF_ALLMULTI)

		flags = HNAE3_USER_MPE;



	return flags;

}
@@ -944,25 +941,6 @@ void hns3_request_update_promisc_mode(struct hnae3_handle *handle) 
		ops->request_update_promisc_mode(handle);

}



void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)

{

	struct hns3_nic_priv *priv = netdev_priv(netdev);

	struct hnae3_handle *h = priv->ae_handle;

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);

	bool last_state;



	if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2 &&

	    h->ae_algo->ops->enable_vlan_filter) {

		last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;

		if (enable != last_state) {

			netdev_info(netdev,

				    "%s vlan filter\n",

				    enable ? "enable" : "disable");

			h->ae_algo->ops->enable_vlan_filter(h, enable);

		}

	}

}



static int hns3_set_tso(struct sk_buff *skb, u32 *paylen_fdop_ol4cs,

			u16 *mss, u32 *type_cs_vlan_tso, u32 *send_bytes)

{
@@ -1980,6 +1958,14 @@ static int hns3_nic_set_features(struct net_device *netdev, 
		return -EINVAL;

	}



	if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&

	    h->ae_algo->ops->enable_vlan_filter) {

		enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);

		ret = h->ae_algo->ops->enable_vlan_filter(h, enable);

		if (ret)

			return ret;

	}



	netdev->features = features;

	return 0;

}
@@ -2825,6 +2811,9 @@ static void hns3_set_default_feature(struct net_device *netdev) 
		netdev->hw_features |= NETIF_F_HW_TC;

		netdev->features |= NETIF_F_HW_TC;

	}



	if (test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps))

		netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER;

}



static int hns3_alloc_buffer(struct hns3_enet_ring *ring,

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

+0 −1
Original line number Diff line number Diff line
@@ -643,7 +643,6 @@ void hns3_set_vector_coalesce_rx_ql(struct hns3_enet_tqp_vector *tqp_vector, 
void hns3_set_vector_coalesce_tx_ql(struct hns3_enet_tqp_vector *tqp_vector,

				    u32 ql_value);



void hns3_enable_vlan_filter(struct net_device *netdev, bool enable);

void hns3_request_update_promisc_mode(struct hnae3_handle *handle);



#ifdef CONFIG_HNS3_DCB