Commit 7f86d128 authored by Joey Gouly's avatar Joey Gouly Committed by Will Deacon
Browse files

arm64: add HWCAP for FEAT_HBC (hinted conditional branches)



Add a HWCAP for FEAT_HBC, so that userspace can make a decision on using
this feature.

Signed-off-by: default avatarJoey Gouly <joey.gouly@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20230804143746.3900803-2-joey.gouly@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent ce33cea5
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+1 −0
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@
#define KERNEL_HWCAP_SME_B16B16		__khwcap2_feature(SME_B16B16)
#define KERNEL_HWCAP_SME_F16F16		__khwcap2_feature(SME_F16F16)
#define KERNEL_HWCAP_MOPS		__khwcap2_feature(MOPS)
#define KERNEL_HWCAP_HBC		__khwcap2_feature(HBC)

/*
 * This yields a mask that user programs can use to figure out what
+1 −0
Original line number Diff line number Diff line
@@ -103,5 +103,6 @@
#define HWCAP2_SME_B16B16	(1UL << 41)
#define HWCAP2_SME_F16F16	(1UL << 42)
#define HWCAP2_MOPS		(1UL << 43)
#define HWCAP2_HBC		(1UL << 44)

#endif /* _UAPI__ASM_HWCAP_H */
+2 −1
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@@ -222,7 +222,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_CSSC_SHIFT, 4, 0),
	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_RPRFM_SHIFT, 4, 0),
	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),
	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),
	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_MOPS_SHIFT, 4, 0),
	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
		       FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_EL1_APA3_SHIFT, 4, 0),
@@ -2840,6 +2840,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
	HWCAP_CAP(ID_AA64ISAR2_EL1, RPRES, IMP, CAP_HWCAP, KERNEL_HWCAP_RPRES),
	HWCAP_CAP(ID_AA64ISAR2_EL1, WFxT, IMP, CAP_HWCAP, KERNEL_HWCAP_WFXT),
	HWCAP_CAP(ID_AA64ISAR2_EL1, MOPS, IMP, CAP_HWCAP, KERNEL_HWCAP_MOPS),
	HWCAP_CAP(ID_AA64ISAR2_EL1, BC, IMP, CAP_HWCAP, KERNEL_HWCAP_HBC),
#ifdef CONFIG_ARM64_SME
	HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
	HWCAP_CAP(ID_AA64SMFR0_EL1, FA64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),
+1 −0
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@ static const char *const hwcap_str[] = {
	[KERNEL_HWCAP_SME_B16B16]	= "smeb16b16",
	[KERNEL_HWCAP_SME_F16F16]	= "smef16f16",
	[KERNEL_HWCAP_MOPS]		= "mops",
	[KERNEL_HWCAP_HBC]		= "hbc",
};

#ifdef CONFIG_COMPAT