Commit 7f865516 authored by Douglas Anderson's avatar Douglas Anderson Committed by Kalle Valo
Browse files

ath10k: Get rid of "per_ce_irq" hw param 



As of the patch ("ath10k: Keep track of which interrupts fired, don't
poll them") we now have no users of this hardware parameter.  Remove
it.

Suggested-by: default avatarBrian Norris <briannorris@chromium.org>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200709082024.v2.2.I083faa4e62e69f863311c89ae5eb28ec5a229b70@changeid
parent d66d24ac

drivers/net/wireless/ath/ath10k/core.c

+0 −13
Original line number Diff line number Diff line
@@ -119,7 +119,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -155,7 +154,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -220,7 +218,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -255,7 +252,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -290,7 +286,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -328,7 +323,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -370,7 +364,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -418,7 +411,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -463,7 +455,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -498,7 +489,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -535,7 +525,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -604,7 +593,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = 0x20,

		.target_64bit = false,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,

		.per_ce_irq = false,

		.shadow_reg_support = false,

		.rri_on_ddr = false,

		.hw_filter_reset_required = true,
@@ -632,7 +620,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,

		.target_64bit = true,

		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,

		.per_ce_irq = true,

		.shadow_reg_support = true,

		.rri_on_ddr = true,

		.hw_filter_reset_required = false,

drivers/net/wireless/ath/ath10k/hw.h

+0 −3
Original line number Diff line number Diff line
@@ -593,9 +593,6 @@ struct ath10k_hw_params { 
	/* Target rx ring fill level */

	u32 rx_ring_fill_level;



	/* target supporting per ce IRQ */

	bool per_ce_irq;



	/* target supporting shadow register for ce write */

	bool shadow_reg_support;